Arbiter (electronics)

Arbiters are electronic devices that allocate access to shared resources. There are multiple ways to perform a computer bus arbitration, with the most popular varieties being: dynamic centralized parallel where one central arbiter is used for all masters as discussed in this article; centralized serial (or "daisy chain") where, upon accessing the bus, the active master passes the opportunity to the next one. In essence, each connected master contains its own arbiter; distributed arbitration by self-selection (distributed bus arbitration) where the access is self-granted based on the decision made locally by using information from other masters; distributed arbitration by collision detection where each master tries to access the bus on its own, but detects conflicts and retries the failed operations. A bus arbiter is a device used in a multi-master bus system to decide which bus master will be allowed to control the bus for each bus cycle. The most common kind of bus arbiter is the memory arbiter in a system bus system. A memory arbiter is a device used in a shared memory system to decide, for each memory cycle, which CPU will be allowed to access that shared memory. Some atomic instructions depend on the arbiter to prevent other CPUs from reading memory "halfway through" atomic read-modify-write instructions. A memory arbiter is typically integrated into the memory controller/DMA controller. Some systems, such as conventional PCI, have a single centralized bus arbitration device that one can point to as "the" bus arbiter. Other systems use decentralized bus arbitration, where all the devices cooperate to decide who goes next. When every CPU connected to the memory arbiter has synchronized memory access cycles, the memory arbiter can be designed as a synchronous arbiter. Otherwise the memory arbiter must be designed as an asynchronous arbiter. An important form of arbiter is used in asynchronous circuits to select the order of access to a shared resource among asynchronous requests.