Publications related to Polarization Screening in Multiferroic (Ga,Mn)As/P(VDF-TrFE) Transistors

Towards Scalable Electronics: Synthetic 2D Materials for Large-Area 2D Circuit Integration

In the past decades, a significant increase of the transistor density on a chip has led to exponential growth in computational power driven by Moore's law. To overcome the bottleneck of traditional von-Neumann architecture in computational efficiency, effo ...

EPFL2024

Strain relaxation and multidentate anchoring in n-type perovskite transistors and logic circuits

Mohammad Khaja Nazeeruddin, Olga Syzgantseva

The engineering of tin halide perovskites has led to the development of p-type transistors with field-effect mobilities of over 70 cm2 V-1 s-1. However, due to their background hole doping, these perovskites are not suitable for n-type transistors. Ambipol ...

Nature Portfolio2024

Active Voltage Balancing with Seamless Integration into Dual Gate Driver for Series Connection of SiC MOSFETs

Drazen Dujic

The versatility of half-bridge configuration of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) power module contributes to its widespread adoption, highlighting the popularity and significance of its corresponding dual gat ...

2024

Measuring electrical properties in semiconductor devices by pixelated STEM and off-axis electron holography (or convergent beams vs. plane waves)

Victor Carle Adrien Boureau

We demonstrate the use of both pixelated differential phase contrast (DPC) scanning transmission electron microscopy (STEM) and off-axis electron holography (EH) for the measurement of electric fields and assess the advantages and limitations of each techn ...

Pergamon-Elsevier Science Ltd2024

A Dual-Channel Gate Driver Design with Active Voltage Balancing Circuit for Series Connection of SiC MOSFETs

Drazen Dujic

Dual-channel gate driver is commonly utilized in the industry for accommodating the widespread use of half-bridge power modules. As wide-bandgap devices become increasingly prevalent due to their superior switching characteristics compared with conventiona ...

2024

Lithium tantalate photonic integrated circuits for volume manufacturing

Tobias Kippenberg, Mikhail Churaev, Xinru Ji, Zihan Li, Alisa Davydova, Junyin Zhang, Yang Chen, Xi Wang, Kai Huang, Chen Yang

Electro-optical photonic integrated circuits (PICs) based on lithium niobate (LiNbO3) have demonstrated the vast capabilities of materials with a high Pockels coefficient1,2. They enable linear and high-speed modulators operating at complementary metal–oxi ...

2024

Highly dispersed nanomaterials in polymer matrix via aerosol-jet-based multi-material 3D printing

Michael James Henry Smith

Polymer-based nanocomposites emerged in the 1960s as a groundbreaking approach to advanced materials. By incorporating robust, durable, and multifunctional nanomaterials into a polymer matrix, the performance of nanocomposites has significantly surpassed t ...

Elsevier2024

SPAD Developed in 55 nm Bipolar-CMOS-DMOS Technology Achieving Near 90% Peak PDP

Edoardo Charbon, Claudio Bruschini, Ekin Kizilkan, Pouyan Keshavarzian, Francesco Gramuglia, Won Yong Ha, Myung Jae Lee

We present a single-photon avalanche diode (SPAD) developed in 55 nm bipolar-CMOS-DMOS (BCD) technology, which achieves high photon detection probability (PDP) while its breakdown voltage is lower than 20 V. To enhance the PDP performance, the SPAD junctio ...

Ieee-Inst Electrical Electronics Engineers Inc2024

Font Side Solutions for c-Si Solar Cells with High-Temperature Passivating Contacts

Ezgi Genç

In this work, we studied the potential of using thin films deposited by plasma-enhanced chemical vapor deposition (PECVD) for two main purposes: introducing an n-type passivating contact at the front of a TOPCon solar cell, or simplifying the fabrication o ...

EPFL2024

Doping Engineering for PDP Optimization in SPADs Implemented in 55-nm BCD Process

Edoardo Charbon, Claudio Bruschini, Myung Jae Lee, Feng Liu

We introduce a new family of single-photon avalanche diodes (SPADs) with enhanced depletion regions in a 55-nm Bipolar-CMOS-DMOS (BCD) technology. We demonstrate how to systematically engineer doping profiles in the main junction and in deep p-well layers ...

Ieee-Inst Electrical Electronics Engineers Inc2024