Logic Optimization of Majority-Inverter Graphs

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Algebraic and Boolean Optimization Methods for AQFP Superconducting Circuits

Giovanni De Micheli, Eleonora Testa, Heinz Riener, Siang-Yun Lee

Adiabatic quantum-flux-parametron (AQFP) circuits are a family of superconducting electronic (SCE) circuits that have recently gained growing interest due to their low-energy consumption, and may serve as alternative technology to overcome the down-scaling ...

IEEE2021

Low-Latency High-Bandwidth Circuit and System Design for Trigger Systems in High Energy Physics

Marcos Vinícius Silva Oliveira

The increasing luminosity in HEP (High Energy Physics) colliders demands trigger systems to be more selective. First, more information from the detector is routed to the trigger system. Second, larger parts of this information are processed together. These ...

EPFL2021

SAT-Based Exact Synthesis: Encodings, Topology Families, and Parallelism

Giovanni De Micheli, Mathias Soeken, Winston Jason Haaswijk

Exact synthesis is a versatile logic synthesis technique with applications to logic optimization, technology mapping, synthesis for emerging technologies, and cryptography. In recent years, advances in SAT solving have lead to a heightened research effort ...

2020

Data Structures and Algorithms for Logic Synthesis in Advanced Technologies

Eleonora Testa

Logic synthesis is a key component of digital design and modern EDA tools; it is thus an essential instrument for the design of leading-edge chips and to push the limits of their performance. In the last decades, the electronic circuits community has evolv ...

EPFL2020

Extending Boolean Methods for Scalable Logic Synthesis

Giovanni De Micheli, Mathias Soeken, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Eleonora Testa

In recent years, Boolean methods in logic synthesis have been drawing the attention of EDA researchers due to the continuous push to advance quality of results. Boolean methods require high computational cost, as they rely on complete functional properties ...

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Exact DAG-Aware Rewriting

Mathias Soeken, Heinz Riener

We present a generic resynthesis framework for optimizing Boolean networks parameterized with a multi-level logic representation, a cut-computation algorithm, and a resynthesis algorithm. The framework allows us to realize powerful optimization algorithms ...

IEEE2020

A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks

Giovanni De Micheli, Mathias Soeken, Luca Gaetano Amarù, Eleonora Testa, Heinz Riener

Logic synthesis is a fundamental step in the realization of modern integrated circuits. It has traditionally been employed for the optimization of CMOS-based designs, as well as for emerging technologies and quantum computing. Recently, it found applicatio ...

IEEE2020

SAT-Sweeping Enhanced for Logic Synthesis

Giovanni De Micheli, Luca Gaetano Amarù, Eleonora Testa

SAT-sweeping is a powerful method for simplifying logic networks. It consists of merging gates that are proven equivalent (up to complementation) by running simulation and SAT solving in synergy. SAT-sweeping is used in both verification and synthesis appl ...

IEEE2020

Programmable Logic Gates Based On Tunable Multistable Mechanisms

Simon Nessim Henein, Hubert Pierre-Marie Benoît Schneegans, Ilan Vardi, Mohamed Gamal Abdelrahman Ahmed Zanaty

Binary logic operations are the building blocks of computing machines. In this paper, we present a new programmable binary logic gate based on programmable multistable mechanisms (PMM), which are multistable structures whose stability behavior depends on m ...

AMER SOC MECHANICAL ENGINEERS2020

Exact Synthesis of Boolean Functions in Majority-of-five Forms

Giovanni De Micheli, Mathias Soeken, Winston Jason Haaswijk, Zhufei Chu

Recent studies show that majority-based logic synthesis is beneficial for both traditional and nanotechnology digital designs. However, most of the existing synthesis algorithms for majority logic generate majority-of-three (M-3) networks. The optimization ...

IEEE2019

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