Publications associées à JESD204B Compliant 12.5 Gb/s LVDS and SST Transmitters in 28 nm FD-SOI CMOS

Graph generative deep learning models with an application to circuit topologies

Modern integrated circuits are tiny yet incredibly complex technological artifacts, composed of millions and billions of individual structures working in unison. Managing their complexity and facilitating their design drove part of the co-evolution of mode ...

EPFL2024

In Liquido Computation with Electrochemical Transistors and Mixed Conductors for Intelligent Bioelectronics

Matteo Cucchi, Eleni Stavrinidou

Next-generation implantable computational devices require long-term-stable electronic components capable of operating in, and interacting with, electrolytic surroundings without being damaged. Organic electrochemical transistors (OECTs) emerged as fitting ...

Wiley-V C H Verlag Gmbh2023

Miniaturised, Wireless and Distributed Neural Interface Toward Cortical Visual Prosthesis

Gian Luca Barbruni

Over the last decades, implantable neural interfaces have been extensively explored and effectively deployed to address neurological and mental health disorders. The existing solutions present several limitations. Firstly, the physical size of the implanta ...

EPFL2023

An Error-Based Approximation Sensing Circuit for Event-Triggered Low-Power Wearable Sensors

David Atienza Alonso, Alexandre Sébastien Julien Levisse, Tomas Teijeiro Campo, Silvio Zanoli, Flavio Ponzina

Event-based sensors have the potential to optimize energy consumption at every stage in the signal processing pipeline, including data acquisition, transmission, processing, and storage. However, almost all state-of-the-art systems are still built upon th ...

2023

An All-Digital 1 Mbps, 57 pJ/bit Bluetooth Low Energy (BLE) Backscatter ASIC in 65 nm CMOS

James Daniel Rosenthal

We present an all-digital application specific integrated circuit (ASIC) that implements Bluetooth Low Energy (BLE)-compatible backscatter communication. The ASIC was fabricated in a 65 nm CMOS process and occupies an active area of 0.12 mm(2) while consum ...

IEEE2022

Energy-Efficient Design Techniques for High-Speed Wireline Serial Links

Firat Çelik

The exponential growth in computing power and multimedia services has caused a tremendous increase in data traffic in recent years. This increase in data traffic brings a strong demand for data bandwidth of electrical input/output (I/O) links and pushes th ...

EPFL2021

Resource Trade-Offs in Circuits and Systems: from Neurotechnology to Communications

Arda Uran

This thesis aims to explore and exploit trade-offs in integrated circuits and systems to overcome the fundamental bottlenecks faced by future data acquisition and communication systems. Specifically, we target the emerging implantable neurotechnology and t ...

EPFL2021

Nonreciprocity in Bianisotropic Systems with Uniform Time Modulation

Xiaoqiang Wang, Mohammad Sajjad Mirmoosa, Xiao Wang

Physical systems with material properties modulated in time provide versatile routes for designing magnetless nonreciprocal devices. Traditionally, nonreciprocity in such systems is achieved exploiting both temporal and spatial modulations, which inevitabl ...

AMER PHYSICAL SOC2020

A 161-mW 56-Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14-nm FinFET

Andreas Peter Burg, Cosimo Aprile, Yusuf Leblebici, Alessandro Cevrero, Gain Kim, Lukas Kull, Ilter Ozkaya, Thomas Toifl

This article introduces a wireline receiver (RX) data-path employing discrete multi-tone (DMT) modulation for communicating over electrical links. The DMT RX incorporates a fully digital equalization data-path, with a synthesized and automatically placed a ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks

Giovanni De Micheli, Mathias Soeken, Luca Gaetano Amarù, Eleonora Testa, Heinz Riener

Logic synthesis is a fundamental step in the realization of modern integrated circuits. It has traditionally been employed for the optimization of CMOS-based designs, as well as for emerging technologies and quantum computing. Recently, it found applicatio ...

IEEE2020