Bridging the gap between dataplanes and commodity operating systems

Publications associées (30)

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Hardware-Software Co-Design of an RPC Processor

Arash Pourhabibi Zarandi

The booming popularity of online services has led to a major evolution in the way these services are built and deployed. To cope with such online data-intensive services, service providers deploy several massive-scale datacenters, also referred to as wareh ...

EPFL2021

Low-Latency High-Bandwidth Circuit and System Design for Trigger Systems in High Energy Physics

Marcos Vinícius Silva Oliveira

The increasing luminosity in HEP (High Energy Physics) colliders demands trigger systems to be more selective. First, more information from the detector is routed to the trigger system. Second, larger parts of this information are processed together. These ...

EPFL2021

Operating System and Network Co-Design for Latency-Critical Datacenter Applications

Evangelos Marios Kogias

Datacenters are the heart of our digital lives. Online applications, such as social-networking and e-commerce, run inside datacenters under strict Service Level Objectives for their tail latency. Tight latency SLOs are necessary for such services to remain ...

EPFL2020

Optimus Prime: Accelerating Data Transformation in Servers

Babak Falsafi, Christoph Koch, Siddharth Gupta, Mario Paulo Drumond Lages De Oliveira, Mark Johnathon Sutherland, Arash Pourhabibi Zarandi, Zilu Tian, Hussein Kassir

Modern online services are shifting away from monolithic applications to loosely-coupled microservices because of their improved scalability, reliability, programmability and development velocity. Microservices communicating over the datacenter network req ...

ACM2020

Combining Dynamic & Static Scheduling in High-level Synthesis

Paolo Ienne, Lana Josipovic

A central task in high-level synthesis is scheduling: the allocation of operations to clock cycles. The classic approach to scheduling is static, in which each operation is mapped to a clock cycle at compile-time, but recent years have seen the emergence o ...

ASSOC COMPUTING MACHINERY2020

QUIC: Opportunities and threats in SATCOM

Ludovic Bernard Gérard Thomas, Emmanuel Qays Dubois

This article proposes a discussion on the strengths, weaknesses, opportunities and threats related to the deployment of QUIC end-to-end from a satellite-operator point-of-view. The deployment of QUIC is an opportunity for improving the quality of experienc ...

IEEE2020

Optimal Coordination of Phasor Data Concentrators in Hierarchical Synchrophasor Networks

Mario Paolone

Phasor data concentrators (PDCs) are essential functions in synchrophasor networks that collect and aggregate phasor measurement unit (PMU) data from across the electric grid. PDC buffers synchrophasor datasets during the “wait time” period, then communica ...

2020

Task scheduling for highly concurrent analytical and transaction workloads

Anastasia Ailamaki, Iraklis Psaroudakis

Systems and method for a task scheduler with dynamic adjustment of concurrency levels and task granularity are disclosed for improved execution of highly concurrent analytical and transactional systems. The task scheduler can avoid both over commitment and ...

2020

R2P2: Making RPCs first-class datacenter citizens

Edouard Bugnion, Evangelos Marios Kogias, Adrien Ghosn, Georgios Prekas, Jonas Fietz

Remote Procedure Calls are widely used to connect datacenter applications with strict tail-latency service level objectives in the scale of µs. Existing solutions utilize streaming or datagram-based transport protocols for RPCs that impose overheads and li ...

USENIX ASSOC2019

Destination buffer analysis for packets rejection obliteration in multi-channel networks

Georgia Fragkouli

In this paper we study a multi-channel network, each station of which is equipped with a network interface that has a receiver buffer of multiple packets. In this way, each station is able to receive multiple packets per time instant. We adopt a synchronou ...

2019

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