A Delay and Power Efficient Voltage Level Shifter with Low Leakage Power

Publications associées (31)

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A Dual-Channel Gate Driver Design with Active Voltage Balancing Circuit for Series Connection of SiC MOSFETs

Drazen Dujic

Dual-channel gate driver is commonly utilized in the industry for accommodating the widespread use of half-bridge power modules. As wide-bandgap devices become increasingly prevalent due to their superior switching characteristics compared with conventiona ...

2024

Polarization-enhanced GaN Schottky barrier diodes: Ultra-thin InGaN for high breakdown voltage and low Ron

Elison de Nazareth Matioli, Zheng Hao, Alessandro Floriduz

In this work, we present a concept that leverages the strong piezoelectric polarization field in InGaN, which counteracts the external electric field at reverse bias. We show that despite the smaller InGaN band-gap and lower critical electric field, its st ...

2024

Power Aware Placement of On-Chip Voltage Regulators

Rassul Bairamkulov

In traditional power delivery networks, the on-chip supply voltage is provided by board-level converters. Due to the significant distance between the converter and the load, variations in the load current are not effectively managed, producing a significan ...

Ieee-Inst Electrical Electronics Engineers Inc2024

Static and Dynamic Voltage Balancing for an IGCT-Based Resonant DC Transformer

Drazen Dujic, Renan Pillon Barcelos, Nikolina Djekanovic

This paper focuses on the operational characteristics of a medium voltage resonant DC transformer based on a split capacitor IGCT 3L-NPC leg. The study delves into both the dynamic and static balancing aspects of the 3L-NPC when operating in a two-level, 5 ...

2024

Modeling and optimization of PCB coils for inductive power transfer systems

Xiaotong Du

The auxiliary power supply for medium voltage converters requires high insulation capability between the source and the load. Inductive power transfer technology, with an air gap between the primary and secondary coil, offers such high insulation capabilit ...

EPFL2024

Analytical Computation of the Sensitivity Coefficients in Hybrid AC/DC Networks

Mario Paolone, Willem Lambrichts

In this paper, we present a model for the analytical computation of the power flow sensitivity coefficients (SCs) for hybrid AC/DC networks. The SCs are defined as the partial derivates of the nodal voltages with respect to the active and reactive power in ...

2024

Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

Siang-Yun Lee

Electronic devices play an irreplaceable role in our lives. With the tightening time to market, exploding demand for computing power, and continuous desire for smaller, faster, less energy-consuming, and lower-cost chips, computer-aided design for electron ...

EPFL2024

Emulating Multimemristive Behavior of Silicon Nanowire-Based Biosensors by Using CMOS-Based Implementations

Sandro Carrara, Junrui Chen, Kapil Bhardwaj

The research presented in this article draws inspiration from previous efforts aimed at replicating the functions of various solid-state memristors using a variety of materials. The memristor circuit emulator serves as a cost-effective tool for circuit des ...

Ieee-Inst Electrical Electronics Engineers Inc2024

A Two-Wired High Input Impedance and High CMRR Active Electrode Insensitive to Component Mismatch

Alexandre Schmid, Mehdi Saberi

This article proposes a new two-wired amplifying active electrode (AE), presenting a high input impedance and a high common-mode rejection ratio (CMRR). In the proposed structure, the input impedance and the CMRR of the system are considerably increased by ...

Ieee-Inst Electrical Electronics Engineers Inc2024

SPAD Developed in 55 nm Bipolar-CMOS-DMOS Technology Achieving Near 90% Peak PDP

Edoardo Charbon, Claudio Bruschini, Ekin Kizilkan, Pouyan Keshavarzian, Francesco Gramuglia, Won Yong Ha, Myung Jae Lee

We present a single-photon avalanche diode (SPAD) developed in 55 nm bipolar-CMOS-DMOS (BCD) technology, which achieves high photon detection probability (PDP) while its breakdown voltage is lower than 20 V. To enhance the PDP performance, the SPAD junctio ...

Ieee-Inst Electrical Electronics Engineers Inc2024

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