An adder, or summer, is a digital circuit that performs addition of numbers. In many computers and other kinds of processors adders are used in the arithmetic logic units (ALUs). They are also used in other parts of the processor, where they are used to calculate addresses, table indices, increment and decrement operators and similar operations.
Although adders can be constructed for many number representations, such as binary-coded decimal or excess-3, the most common adders operate on binary numbers.
In cases where two's complement or ones' complement is being used to represent negative numbers, it is trivial to modify an adder into an adder–subtractor.
Other signed number representations require more logic around the basic adder.
In 1937, Claude Shannon demonstrated binary addition in his graduate thesis at MIT.
The half adder adds two single binary digits and . It has two outputs, sum () and carry (). The carry signal represents an overflow into the next digit of a multi-digit addition. The value of the sum is . The simplest half-adder design, pictured on the right, incorporates an XOR gate for and an AND gate for . The Boolean logic for the sum (in this case ) will be whereas for the carry () will be . With the addition of an OR gate to combine their carry outputs, two half adders can be combined to make a full adder. The half adder adds two input bits and generates a carry and sum, which are the two outputs of a half adder. The input variables of a half adder are called the augend and addend bits. The output variables are the sum and carry.
The truth table for the half adder is:
{| class="wikitable" style="text-align:center"
|-
! colspan="2"| Inputs || colspan="2"| Outputs
|- style="background:#def; text-align:center;"
| A || B || Cout || S
|- style="background:#dfd; text-align:center;"
| 0 || 0 || 0 || 0
|- style="background:#dfd; text-align:center;"
| 0 || 1 || 0 || 1
|- style="background:#dfd; text-align:center;"
| 1 || 0 || 0 || 1
|- style="background:#dfd; text-align:center;"
| 1 || 1 || 1 || 0
|-
|}
Various half adder digital logic circuits:
File:Halfadder.
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