Pierre-André FarinePierre-André Farine received the Doctoral and Engineering Degrees in Microtechnology from University of Neuchâtel, Switzerland, respectively in 1984 and 1978, and the Engineering in Microtechnology from ETS Le Locle in 1974.
He was working 17 years for the Swiss watch industries (Swatch Group), including developments for high-tech products, such as pager watches, watches including integrated sensors such as pressure, compass, altimeter and temperature sensors for Tissot. He was also involved in prototypes developments for watches including GPS and cellular GSM phones.
Since 8 years, he is Professor in Electronics and Signal Processing at the Institute of Microtechnology IMT, University of Neuchâtel, Switzerland. Full professor at EPFL since January 1st, 2009, he works in the field of low-power integrated products for portable devices, including microelectronics for wireless telecommunications, UWB and GNSS systems. He is Head of the Electronics and Signal Processing Laboratory ESPLAB of the EPFL IMT-NE. His laboratory works also for video and audio compression algorithms and their implementation in low power integrated circuits.
Christian EnzChristian C. Enz (M84, S'12) received the M.S. and Ph.D. degrees in Electrical Engineering from the EPFL in 1984 and 1989 respectively. From 1984 to 1989 he was research assistant at the EPFL, working in the field of micro-power analog IC design. In 1989 he was one of the founders of Smart Silicon Systems S.A. (S3), where he developed several low-noise and low-power ICs, mainly for high energy physics applications. From 1992 to 1997, he was an Assistant Professor at EPFL, working in the field of low-power analog CMOS and BiCMOS IC design and device modeling. From 1997 to 1999, he was Principal Senior Engineer at Conexant (formerly Rockwell Semiconductor Systems), Newport Beach, CA, where he was responsible for the modeling and characterization of MOS transistors for the design of RF CMOS circuits. In 1999, he joined the Swiss Center for Electronics and Microtechnology (CSEM) where he launched and lead the RF and Analog IC Design group. In 2000, he was promoted Vice President, heading the Microelectronics Department, which became the Integrated and Wireless Systems Division in 2009. He joined the EPFL as full professor in 2013, where he is currently the director of the Institute of Microengineering (IMT) and head of the Integrated Circuits Laboratory (ICLAB).He is lecturing and supervising undergraduate and graduate students in the field of Analog and RF IC Design at EPFL. His technical interests and expertise are in the field of very low-power analog and RF IC design, semiconductor device modeling, and inexact and error tolerant circuits and systems.He has published more than 200 scientific papers and has contributed to numerous conference presentations and advanced engineering courses. Together with E. Vittoz and F. Krummenacher he is one of the developer of the EKV MOS transistor model and the author of the book "Charge-Based MOS Transistor Modeling - The EKV Model for Low-Power and RF IC Design" (Wiley, 2006). He has been member of several technical program committees, including the International Solid-State Circuits Conference (ISSCC) and European Solid-State Circuits Conference (ESSCIRC). He has served as a vice-chair for the 2000 International Symposium on Low Power Electronics and Design (ISLPED), exhibit chair for the 2000 International Symposium on Circuits and Systems (ISCAS) and chair of the technical program committee for the 2006 European Solid-State Circuits Conference (ESSCIRC). Since 2012 he has been elected as member of the IEEE Solid-State Circuits Society (SSCS) Administrative Commmittee (AdCom). He is also Chair of the IEEE SSCS Chapter of Switzerland.
Pavel KejikPavel Kejik received the diploma degree in 1994 and the Ph.D. degree in 1999 at the Czech Technical University of Prague. In 1999, he joined the Institute of Microelectronics and Microsystems at the EPFL to work on Institute's circuit design and testing. His research interests include fluxgate magnetometry and micro-Hall sensors combined with mixed-signal IC design and low-noise circuit design for industrial applications. Since 2014, Pavel is with Monolithic Power Systems company (the EPFL spin-off company Sensima Technology SA before acquisition) actively working on industrialization of magnetic sensors. He is inventor or co-inventor of several patents related to novel magnetic sensing structures and methods in the domain of contactless current measurement, angular sensing and non-destructive testing. He is giving a lecture devoted to recent developments in the field of smart Hall microsystems within the frame of a yearly Europractice course
Smart sensor systems
.
Luis Guillermo Villanueva TorrijoGuillermo Villanueva is a Tenure Track Assistant Professor at the Ecole Polytechnique Federale de Lausane (EPFL), Switzerland, in the Mechanical Engineering Institute (IGM). Before joining EPFL he was a Marie Curie post-doctoral scholar at DTU (Denmark) and Caltech (California, US); and before a post-doc at EPFL-LMIS1. He received his M.Sc. in Physics in Zaragoza (Spain) and his PhD from the UAB in Barcelona (Spain).
Since the start of his PhD (2002), Prof. Villanueva has been active in the fields of NEMS/MEMS for sensing, having expertise from the design and fabrication to the characterization and applicability. He has co-authored more than 75 papers in peer-reviewed journals (h-index of 24 WoK, 32 GoS) and more than 100 contributions to international conferences.
He is serving, or has served, on the program committees of IEEE-NEMS, IEEE-Sensors, MNE, IEEE-FCS and Transducers. He is editor of Microelectronic Engineering. He has co-organized MNE2014 and SNC2015; and he is currently co-organizing the short courses at Transducers 2019 and the 16th International Workshop on Nanomechanical Sensors (NMC2019).
David Atienza AlonsoDavid Atienza Alonso is an associate professor of EE and director of the Embedded Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and PhD degrees in computer science and engineering from UCM, Spain, and IMEC, Belgium, in 2001 and 2005, respectively. His research interests include system-level design methodologies for multi-processor system-on-chip (MPSoC) servers and edge AI architectures. Dr. Atienza has co-authored more than 350 papers, one book, and 12 patents in these previous areas. He has also received several recognitions and award, among them, the ICCAD 10-Year Retrospective Most Influential Paper Award in 2020, Design Automation Conference (DAC) Under-40 Innovators Award in 2018, the IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He has also earned two best paper awards at the VLSI-SoC 2009 and CST-HPCS 2012 conference, and five best paper award nominations at the DAC 2013, DATE 2013, WEHA-HPCS 2010, ICCAD 2006, and DAC 2004 conferences. He serves or has served as associate editor of IEEE Trans. on Computers (TC), IEEE Design & Test of Computers (D&T), IEEE Trans. on CAD (T-CAD), IEEE Transactions on Sustainable Computing (T-SUSC), and Elsevier Integration. He was the Technical Program Chair of DATE 2015 and General Chair of DATE 2017. He served as President of IEEE CEDA in the period 2018-2019 and was GOLD member of the Board of Governors of IEEE CASS from 2010 to 2012. He is a Distinguished Member of ACM and an IEEE Fellow.
Mihai Adrian IonescuAdrian M. Ionescu is Full Professor at the Swiss Federal Institute of Technology, Lausanne, Switzerland. He received the B.S./M.S. and Ph.D. degrees from the Polytechnic Institute of Bucharest, Romania and the National Polytechnic Institute of Grenoble, France, in 1989 and 1997, respectively. He has held staff and/or visiting positions at LETI-CEA, Grenoble, France and INP Grenoble, France and Stanford University, USA, in 1998 and 1999. Dr. Ionescu has published more than 600 articles in international journals and conferences. He received many Best Paper Awards in international conferences, the Annual Award of the Technical Section of the Romanian Academy of Sciences in 1994 and the Blondel Medal in 2009 for contributions to the progress in engineering sciences in the domain of electronics. He is the 2013 recipient of the IBM Faculty Award in Engineering. He served the IEDM and VLSI conference technical committees and was the Technical Program Committee (Co)Chair of ESSDERC in 2006 and 2013. He is a member of the SATW. He is director of the Laboratory of Micro/Nanoelectronic Devices (NANOLAB).
Alain WegmannAlain Wegmann joined EPFL in 1996. His interests are in techniques to better align business and IT. He developed, with his group and partners, the SEAM methods: SEAM for business (strategic thinking), SEAM for enterprise architecture (business/IT alignment) and SEAM for software (IT). The originality of SEAM is in the integration of generic systems thinking principles into discipline-specific methods. This integration has three benefits: (1) the possibility to relate the different disciplines (by having common systemic principles); (2) the capability to leverage on discipline-specific knowledge (by using the vocabulary and the heuristics of each discipline) and (3) to be more efficient in solving problems (by benefiting from the problem solving techniques developed in systems thinking). SEAM is currently applied in master courses and consulting. Consulting is done for start-ups developing their business and technology strategies and for large companies having service-oriented architecture projects.
Prior to joining EPFL, Alain Wegmann worked for 14 years with Logitech in software development/engineering management (Switzerland, Taiwan, US), manufacturing (Taiwan) and marketing (US). When he left Logitech, Alain Wegmann was engineering vice-president and marketing director for large accounts.