Concept

Instruction scheduling

Related publications (22)

Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs

Mathias Josef Payer, Mirjana Stojilovic, Shashwat Shrivastava, Ognjen Glamocanin, Jinwei Yao, Nour Ardo

Side-channel disassembly attacks recover CPU instructions from power or electromagnetic side-channel traces measured during code execution. These attacks typically rely on physical access, proximity to the victim device, and high sampling rate measuring in ...

2023

DASS: Combining Dynamic & Static Scheduling in High-Level Synthesis

Paolo Ienne, Lana Josipovic

A central task in high-level synthesis is scheduling: the allocation of operations to clock cycles. The classic approach to scheduling is static, in which each operation is mapped to a clock cycle at compile-time, but recent years have seen the emergence o ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Combining Dynamic & Static Scheduling in High-level Synthesis

Paolo Ienne, Lana Josipovic

ASSOC COMPUTING MACHINERY2020

A Reinforcement Learning Approach to Train Routing and Scheduling

Zora Oswald

Good train scheduling for a big network with many trains is very hard to achieve. As the trains are competing for the tracks with one another, the number of constraints grows rapidly. Trying to take advantage of emerging technologies in the areas of optimi ...

2020

Efficient Dynamic Optimisation Heuristics for Dataflow Pipelines

Marco Mattavelli, Simone Casale Brunet, Endri Bezati

Large dataflow designs appear as a result of functional specification of modern complex digital systems and/ or a result of unfolding and behavioral transformation of looped and branched programs. Since deep-submicron silicon technology provides large amou ...

IEEE2018

Hybrid, Job-Aware, and Preemptive Datacenter Scheduling

Pamela Isabel Delgado Borda

Scheduling in datacenters is an important, yet challenging problem. Datacenters are composed of a large number, typically tens of thousands, of commodity computers running a variety of data-parallel jobs. The role of the scheduler is to assign cluster reso ...

EPFL2018

Optimisation du système d’assainissement des eaux urbaines Réseau-STEP-Milieu récepteur par une approche de gestion intégrée

Jean-Baptiste Razurel

Water management is a recurring problem that has occupied mankind for years. Nowadays, the multiple stakeholders involved in this management have the willingness to cooperate to make it more integrated and take into consideration all social, economic and e ...

2016

Synthesis and Optimization of Pipelines for HW Implementations of Dataflow Programs

Marco Mattavelli, Endri Bezati, Ab Al Hadi Bin Ab Rahman, Anatoly Prihozhy

This paper introduces a new methodology for pipeline synthesis with applications to data flow high-level system design. The pipeline synthesis is applied to dataflow programs whose operators are translated into graphs and dependencies relations that are th ...

Ieee-Inst Electrical Electronics Engineers Inc2015

Establishing a base of trust with performance counters for enterprise workloads

Willy Zwaenepoel, Andrzej Pawel Nowak

Understanding the performance of large, complex enterprise-class applications is an important, yet nontrivial task. Methods using hardware performance counters, such as profiling through event-based sampling, are often favored over instrumentation for anal ...

2015

Shared Frontend for Manycore Server Processors

Ilknur Cansu Kaynak

Instruction-supplymechanisms, namely the branch predictors and instruction prefetchers, exploit recurring control flow in an application to predict the applicationâs future control flow and provide the core with a useful instruction stream to execute in ...

EPFL2015

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