Publications related to MediaTek

Automatic and high-precision microseismic monitoring of progressive failure prior, during, and after tunnel excavation

Brice Tanguy Alphonse Lecampion, Seyyedmaalek Momeni, Christophe Nussbaum

Acoustic emission (AE) monitoring is commonly used to inspect the health of a structure continuously. During fracture processes elastic waves of AE are created and emitted, and sensors can capture these waves. The acquired signals can be processed to track ...

2023

Simulation, Analysis, and Verification of Substrate Currents for Layout Optimization of Smart Power ICs

Maher Kayal, Jean-Michel Sallese, Camillo Stefanucci, Pietro Buccella

Today circuit failures in Smart Power ICs due to substrate couplings are partially addressed during the circuit design phase. The state-of-the-art guidelines for the optimization of parasitic couplings provide mainly qualitative rules, which are difficult ...

Institute of Electrical and Electronics Engineers2016

Full System Simulation of Many-Core Heterogeneous SoCs using GPU and QEMU Semihosting

David Atienza Alonso, Luca Benini, Martino Ruggiero, Shivani Raghav

Modern system-on-chips are evolving towards complex and heterogeneous platforms with general-purpose processors coupled with massively parallel manycore accelerator fabrics (e.g. embedded GPUs). Platform developers are looking for efficient full-system sim ...

2012

Realization and Characterization of MEMS-Based Programmable Slit Mask for Multi-Object Spectroscopy

Nico de Rooij, Michael David Canonica, Wilfried Noell

Multi-object spectroscopy (MOS) is a powerful tool for space and ground-based telescopes for studying the formation of galaxies. This technique requires a programmable slit mask for astronomical object selection. A first sample of MEMS-based programmable r ...

Spie-Int Soc Optical Engineering, Po Box 10, Bellingham, Wa 98227-0010 Usa2010

SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3D Systems on Chips

Giovanni De Micheli, Luca Benini, Srinivasan Murali, Ciprian Seiculescu

Three-dimensional integrated circuits (3D-ICs) are a promising approach to address the integration challenges faced by current systems on chips (SoCs). Designing an efficient network on chip (NoC) interconnect for a 3-D SoC that meets not only the applicat ...

2010

Optimistic chordal coloring: a coalescing heuristic for SSA form programs

Paolo Ienne, Philip Brisk, Ajay Kumar Verma

The interference graph for a procedure in Static Single Assignment (SSA) Form is chordal. Since the k-colorability problem can be solved in polynomial-time for chordal graphs, this result has generated interest in SSA-based heuristics for spilling and coal ...

Springer US2009

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MediaTek

Automatic and high-precision microseismic monitoring of progressive failure prior, during, and after tunnel excavation

Automatic and high-precision acoustic emission-based structural health monitoring of concrete structures

Simulation, Analysis, and Verification of Substrate Currents for Layout Optimization of Smart Power ICs

The Road to Affordable, Large-Scale Silicon Photonics

Full System Simulation of Many-Core Heterogeneous SoCs using GPU and QEMU Semihosting

Realization and Characterization of MEMS-Based Programmable Slit Mask for Multi-Object Spectroscopy

SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3D Systems on Chips

Optimistic chordal coloring: a coalescing heuristic for SSA form programs

Graph Chatbot

Chat with Graph Search

Automatic and high-precision microseismic monitoring of progressive failure prior, during, and after tunnel excavation

The Road to Affordable, Large-Scale Silicon Photonics

Automatic and high-precision acoustic emission-based structural health monitoring of concrete structures

Realization and Characterization of MEMS-Based Programmable Slit Mask for Multi-Object Spectroscopy

Optimistic chordal coloring: a coalescing heuristic for SSA form programs

SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3D Systems on Chips

Full System Simulation of Many-Core Heterogeneous SoCs using GPU and QEMU Semihosting

Simulation, Analysis, and Verification of Substrate Currents for Layout Optimization of Smart Power ICs