Related publications (163)

A multitasking and data-driven architecture for multi-agents simulations

Sébastien Schertenleib

The expansion of 3D real-time simulations (3DRTS) into millions of homes together with the technical progress of computers hardware force to approach software developments for 3DRTS from different perspectives. From an historical standpoint, 3DRTS started ...
EPFL2006

An Architecture Design Methodology for Minimal Total Power Consumption at Fixed Vdd and Vth

Pierre-André Farine, Christian Piguet

This paper presents a new methodology allowing to compare several architectures (or microarchitectures) performing the same function and to select the one presenting the smallest total power consumption under fixed supply voltage (Vdd), threshold voltage ( ...
2005

Low-Power Adaptive Bias/Clock Generator Using 0.18um CMOS Technology for Multi-Core Continuous Voltage and Frequency Scaling

Yusuf Leblebici, Zeynep Toprak Deniz

This paper presents a continuous voltage and frequency scaling approach achieving lower transition (both energy and time) overheads implied by changing voltage levels, at a very low power dissipation and silicon area cost for multi-processor systems with i ...
2005

A Robust Self-calibrating Transmission Scheme for On-Chip Networks

Giovanni De Micheli, Paolo Ienne, Patrick Thiran, Frédéric Worm

Systems-on-Chip (SoC) design involves several challenges, stemming from the extreme miniaturization of the physical features and from the large number of devices and wires on a chip. Since most SoCs are used within embedded systems, specific concerns are i ...
2005

A Low-Power Adaptive Bias/Clock Generator for Fine-Grained Voltage and Frequency Scaling in Multi-Core Systems

Yusuf Leblebici, Zeynep Toprak Deniz

This paper presents a continuous voltage and frequency scaling approach achieving lower transition (both energy and time) overheads implied by changing voltage levels, at a very low power dissipation and silicon area cost for multi-processor systems with i ...
2005

Dynamically Trading Frequency for Complexity in a GALS Microprocessor

Microprocessors are traditionally designed to provide “best overall” performance across a wide range of applications and operating environments. Several groups have proposed hardware techniques that save energy by “downsizing” hardware resources that are u ...
2004

Graphical Monitoring of CPU Resource Consumption in a Java-based Framework

Andrea Camesi

Monitoring of CPU consumption is a very basic requirement in many areas of software. It is especially valuable in the frame of Internet applications, in support of specific aspects such as security, reliability and adaptability. This paper is set in the co ...
2004

Dynamic Frequency and Voltage Scaling for a Multiple-Clock-Domain Microprocessor

Sandhya Dwarkadas

Multiple clock domains is one solution to the increasing problem of propagating the clock signal across increasingly larger and faster chips. The ability to independently scale frequency and voltage in each domain creates a powerful means of reducing power ...
2003

Profile-based Dynamic Voltage and Frequency Scaling for a Multiple Clock Domain Microprocessor

A Multiple Clock Domain (MCD) processor addresses the challenges of clock distribution and power dissipation by dividing a chip into several (coarse-grained) clock domains, allowing frequency and voltage to be reduced in domains that are not currently on t ...
2003

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