Concept
PCI Express
Related people (25)
Andreas Peter Burg
Andreas Burg was born in Munich, Germany, in 1975. He received his Dipl.-Ing. degree in 2000 from the Swiss Federal Institute of Technology (ETH) Zurich, Zurich, Switzerland. He then joined the Integrated Systems Laboratory of ETH Zurich, from where he graduated with the Dr. sc. techn. degree in 2006.
In 1998, he worked at Siemens Semiconductors, San Jose, CA. During his doctoral studies, he was an intern with Bell Labs Wireless Research for a total of one year. From 2006 to 2007, he held positions as postdoctoral researcher at the Integrated Systems Laboratory and at the Communication Theory Group of the ETH Zurich. In 2007 he co-founded Celestrius, an ETH-spinoff in the field of MIMO wireless communication, where he was responsible for the ASIC development as Director for VLSI. In January 2009, he joined ETH Zurich as SNF Assistant Professor and as head of the Signal Processing Circuits and Systems group at the Integrated Systems Laboratory.
In January 2011, he became a Tenure Track Assistant Professor at the Ecole Polytechnique Federale de Lausanne (EPFL) where he is leading the Telecommunications Circuits Laboratory in the School of Engineering. In June 2018 he was promoted to the role of a Tenured Associate Professor.
In 2000, Mr. Burg received the Willi Studer Award and the ETH Medal for his diploma and his diploma thesis, respectively. Mr. Burg was also awarded an ETH Medal for his Ph.D. dissertation in 2006. In 2008, he received a 4-years grant from the Swiss National Science Foundation (SNF) for an SNF Assistant Professorship. In his professional career, Mr. Burg was involved in the development of more than 25 ASICs. He is a member of the IEEE and of the European Association for Signal Processing (EURASIP).
Research interests and expertise
- Circuits and systems for telecommunications (wireless and wired)
- Prototyping and silicon implementation of new communication technologies
- Development of communication algorithms and optimization for hardware implementation
- Low-power VLSI signal processing for communications and other applications
- Digital integrated circuits
- Circuits for image and video processing
Edoardo Charbon
Edoardo Charbon (SM’00 F’17) received the Elektrotechnik Diploma from ETH Zurich, the M.S. from the University of California at San Diego, and the Ph.D. from the University of California at Berkeley in 1988, 1991, and 1995, respectively, all in electrical engineering and EECS. He has consulted with numerous organizations, including Bosch, X-Fab, Texas Instruments, Maxim, Sony, Agilent, and the Carlyle Group. He was with Cadence Design Systems from 1995 to 2000, where he was the architect of the company's initiative on information hiding for intellectual property protection. In 2000, he joined Canesta Inc., as the Chief Architect, where he led the development of wireless 3-D CMOS image sensors. Since 2002 he has been a member of the faculty of EPFL, where is a full professor since 2015. From 2008 to 2016 he was full professor and chair at the Delft University of Technology, where he spearheaded the university's effort on cryogenic electronics for quantum computing as part of QuTech. He has been the driving force behind the creation of deep-submicron CMOS SPAD technology, which is mass-produced since 2015 and is present in smartphones, telemeters, proximity sensors, and medical diagnostics tools. His interests span from 3-D vision, LiDAR, FLIM, FCS, NIROT to super-resolution microscopy, time-resolved Raman spectroscopy, and cryo-CMOS circuits and systems for quantum computing. He has authored or co-authored over 400 papers and two books, and he holds 23 patents. Dr. Charbon is a distinguished visiting scholar of the W. M. Keck Institute for Space at Caltech, a fellow of the Kavli Institute of Nanoscience Delft, a distinguished lecturer of the IEEE Photonics Society, and a fellow of the IEEE.
Drazen Dujic
Drazen Dujic is an Associate Professor and Head of the Power Electronics Laboratory at EPFL. He received the Dipl.Ing. and MSc degrees from the University of Novi Sad, Serbia in 2002 and 2005, respectively, and the PhD degree from Liverpool John Moores University, UK in 2008. From 2003 to 2006, he was a Research Assistant with the Faculty of Technical Sciences at University of Novi Sad. From 2006 to 2009, he was a Research Associate with Liverpool John Moores University. After that he moved to industry and joined ABB Switzerland Ltd, where from 2009 to 2013, he was Scientist and then Principal Scientist with ABB Corporate Research Center in Baden-Dättwil, and from 2013 to 2014 he was R&D Platform Manager with ABB Medium Voltage Drives in Turgi. He joined EPFL in 2014 as Tenure Track Assistant Professor and was promoted to Associate Professor in 2021. His research interests include the areas of design and control of advanced high power electronic systems and high-performance drives, predominantly for the medium voltage applications related to electrical energy generation, conversion and storage. He has authored or coauthored more than 150 scientific publications and has filed 16 patents. In 2018 he received EPE Outstanding Service Award from European Power Electronics and Drives Association and in 2014 the Isao Takahashi Power Electronics Award for Outstanding Achievement in Power Electronics. He is Senior Member of IEEE, and serves as Associate Editor for IEEE Transactions on Power Electronics, IEEE Transactions on Industrial Electronics and IET Electric Power Applications. He is Chairman of the Swiss IEEE Power Electronics Society (PELS) Chapter and IEEE PELS R8 Chair.
Volkan Cevher
Volkan Cevher received the B.Sc. (valedictorian) in electrical engineering from Bilkent University in Ankara, Turkey, in 1999 and the Ph.D. in electrical and computer engineering from the Georgia Institute of Technology in Atlanta, GA in 2005. He was a Research Scientist with the University of Maryland, College Park from 2006-2007 and also with Rice University in Houston, TX, from 2008-2009. Currently, he is an Associate Professor at the Swiss Federal Institute of Technology Lausanne and a Faculty Fellow in the Electrical and Computer Engineering Department at Rice University. His research interests include machine learning, signal processing theory, optimization theory and methods, and information theory. Dr. Cevher is an ELLIS fellow and was the recipient of the Google Faculty Research award in 2018, the IEEE Signal Processing Society Best Paper Award in 2016, a Best Paper Award at CAMSAP in 2015, a Best Paper Award at SPARS in 2009, and an ERC CG in 2016 as well as an ERC StG in 2011.