Concept
Tornado code
Related people (26)
Mohammad Amin Shokrollahi
Amin Shokrollahi has worked on a variety of topics, including coding theory, computational number theory and algebra, and computational/algebraic complexity theory. He is best known for his work on iterative decoding algorithms of graph based codes, an area in which he holds a number of granted and pending patents. He is the co-inventor of Tornado codes, and the inventor of Raptor codes. His codes have been standardized and successfully deployed in practical areas dealing with data transmission over lossy networks.
Prior to joining EPFL, Amin Shokrollahi has held positions as the chief scientist of Digital Fountain, member of the technical staff at Bell Laboratories, senior researcher at the International Computer Science Insitute in Berkeley, and assistant professor at the department of computer science of the university of Bonn. He is a Fellow of the IEEE, and he was awarded the Best Paper Award of the IEEE IT Society in 2002 for his work on iterative decoding of LDPC code, the IEEE Eric Sumner Award in 2007 for the development of Fountain Codes, and the joint Communication Society/Information Theory Society best paper award of 2007 for his paper on Raptor Codes.
Andreas Peter Burg
Andreas Burg was born in Munich, Germany, in 1975. He received his Dipl.-Ing. degree in 2000 from the Swiss Federal Institute of Technology (ETH) Zurich, Zurich, Switzerland. He then joined the Integrated Systems Laboratory of ETH Zurich, from where he graduated with the Dr. sc. techn. degree in 2006.
In 1998, he worked at Siemens Semiconductors, San Jose, CA. During his doctoral studies, he was an intern with Bell Labs Wireless Research for a total of one year. From 2006 to 2007, he held positions as postdoctoral researcher at the Integrated Systems Laboratory and at the Communication Theory Group of the ETH Zurich. In 2007 he co-founded Celestrius, an ETH-spinoff in the field of MIMO wireless communication, where he was responsible for the ASIC development as Director for VLSI. In January 2009, he joined ETH Zurich as SNF Assistant Professor and as head of the Signal Processing Circuits and Systems group at the Integrated Systems Laboratory.
In January 2011, he became a Tenure Track Assistant Professor at the Ecole Polytechnique Federale de Lausanne (EPFL) where he is leading the Telecommunications Circuits Laboratory in the School of Engineering. In June 2018 he was promoted to the role of a Tenured Associate Professor.
In 2000, Mr. Burg received the Willi Studer Award and the ETH Medal for his diploma and his diploma thesis, respectively. Mr. Burg was also awarded an ETH Medal for his Ph.D. dissertation in 2006. In 2008, he received a 4-years grant from the Swiss National Science Foundation (SNF) for an SNF Assistant Professorship. In his professional career, Mr. Burg was involved in the development of more than 25 ASICs. He is a member of the IEEE and of the European Association for Signal Processing (EURASIP).
Research interests and expertise
- Circuits and systems for telecommunications (wireless and wired)
- Prototyping and silicon implementation of new communication technologies
- Development of communication algorithms and optimization for hardware implementation
- Low-power VLSI signal processing for communications and other applications
- Digital integrated circuits
- Circuits for image and video processing
Rüdiger Urbanke
Rüdiger L. Urbanke obtained his Dipl. Ing. degree from the Vienna University of Technology, Austria in 1990 and the M.Sc. and PhD degrees in Electrical Engineering from Washington University in St. Louis, MO, in 1992 and 1995, respectively. He held a position at the Mathematics of Communications Department at Bell Labs from 1995 till 1999 before becoming a faculty member at the School of Computer & Communication Sciences (I&C) of EPFL. He is a member of the Information Processing Group. He is principally interested in the analysis and design of iterative coding schemes, which allow reliable transmission close to theoretical limits at low complexities. Such schemes are part of most modern communications standards, including wireless transmission, optical communication and hard disk storage. More broadly, his research focuses on the analysis of graphical models and the application of methods from statistical physics to problems in communications. From 2000-2004 he was an Associate Editor of the IEEE Transactions on Information Theory and he is currently on the board of the series "Foundations and Trends in Communications and Information Theory." In 2017 he was President of the Information Theory Society. From 2009 till 2012 he was the head of the I&C doctoral school, in 2013 he served as Dean a. i. of I&C, and since 2016 he is the Associated Dean for teaching of I&C. He is a co-author of the book "Modern Coding Theory" published by Cambridge University Press. Awards: 2021 IEEE Information Theory Society Paper Award 2016 STOC Best Paper Award 2014 La Polysphere Teaching Award 2014 IEEE Hamming Medal 2013 IEEE Information Theory Society Paper Award 2011 MASCO Best Paper Award 2011 IEEE Koji Kobayashi Award 2009 La Polysphere Teaching Award 2002 IEEE Information Theory Society Paper Award Fulbright Scholarship My students have won the following awards: M. Mondelli, 2021 IEEE Information Theory Paper Award M. Mondelli, EPFL Doctorate Award 2018 M. Mondelli, Patrick Denantes Award, 2017 M. Mondelli, IEEE IT Society Student Paper Award at ISIT, 2015 M. Mondelli, Dan David Prize Scholarship, 2015 H. Hassani, Inaugural Thomas Cover Dissertation Award, 2014 S. Kudekar, 2013 & 2021 IEEE Information Theory Paper Award A. Karbasi, Patrick Denantes Award, 2013 V. Venkatesan, Best Paper Award at MASCOTS, 2011 A. Karbasi, Best Student Paper Award at ICASSP, 2011 (with R. Parhizkar) A. Karbasi, Best Student Paper Award at ACM SIGMETRICS, 2010 (with S. Oh) S. Korada, ABB Dissertation Award, 2010 S. Korada, IEEE IT Society Student Paper Award at ISIT, 2009 (with E. Sasoglu) S. Korada, IEEE IT Society Student Paper Award at ISIT, 2008
Nicolas Macris
Nicolas Macris received the PhD degree in theoretical physics from EPFL and then pursued his scientific activity at the mathematics department of Rutgers University (NJ, USA). He then joined the Faculty of Basic Science of EPFL, working in the field of quantum statistical mechanics and mathematical aspects of the quantum Hall effect. Since 2005 he is with the Communication Theories Laboratory and Information Processing group of the School of Communication and Computer Science and currently works at the interface of statistical mechanics, information theory and error correcting codes, inference and learning theory. He held long-term visiting appointments and collaborations with the University College and the Institute of Advanced studies in Dublin, the Ecole Normale Supérieure de Lyon, the Centre de Physique Theorique Luminy Marseille, Paris XI Orsay, the ETH Zürich and more recently Los Alamos National Lab. CV and publication list.
Paolo Ienne
Paolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.