Semaphore (programming)

Applied sciences
Computer engineering
High-performance computing
Parallel computing

Related publications (16)

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Universally Scalable Concurrent Data Structures

Tudor Alexandru David

The increase in the number of cores in processors has been an important trend over the past decade. In order to be able to efficiently use such architectures, modern software must be scalable: performance should increase proportionally to the number of all ...

EPFL2017

MOOLs for MOOCs: A first edX scalable implementation

Denis Gillet, Christophe Salzmann, Yves Henri Philippe Piguet

Deploying remote laboratories at a large scale is the next challenge in remote experimentation. It is referred as Massive Open Online Labs (MOOLs). Being able to sustain a massive number of users accessing a specific resource concurrently is a complex task ...

IEEE2016

Concurrent Search Data Structures Can Be Blocking and Practically Wait-Free

Rachid Guerraoui, Tudor Alexandru David

We argue that there is virtually no practical situation in which one should seek a "theoretically wait-free" algorithm at the expense of a state-of-the-art blocking algorithm in the case of search data structures: blocking algorithms are simple, fast, and ...

ACM2016

Dataflow Programs Analysis and Optimization Using Model Predictive Control Techniques. Two Examples of Bounded Buffer Scheduling: Deadlock Avoidance and Deadlock Recovery Strategies

Marco Mattavelli, Simone Casale Brunet, Endri Bezati

The analysis of the trace graphs generated by dataflow program executions has been shown to be an effective tool for exploring and optimizing the design space of application programs on manycore/multicore platforms. In this work a new approach aiming at fi ...

Springer2015

Exploiting Circuit Duality to Speed Up SAT

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Maciej Jerzy Ciesielski

In this paper, we establish a non-trivial duality between tautology and contradiction check to speed up circuit SAT. Tautology check determines if a logic circuit is true in every possible interpretation. Analogously, contradiction check dete ...

IEEE2015

A Methodology For Optimizing Buffer Sizes Of Dynamic Dataflow Fpgas Implementations

Marco Mattavelli, Claudio Paolo Alberti, Simone Casale Brunet, Ab Al Hadi Bin Ab Rahman

Minimizing buffer sizes of dynamic dataflow implementations without introducing deadlocks or reducing the design performance is in general an important and useful design objective. Indeed, buffer sizes that are too small causing a system to deadlock during ...

Ieee2014

Scalability of write-ahead logging on multicore and multisocket hardware

Anastasia Ailamaki, Frederick Ryan Johnson, Manoussos Gavriil Athanassoulis, Radu Ioan Stoica, Ippokratis Pandis

The shift to multi-core and multi-socket hardware brings new challenges to database systems, as the software parallelism determines performance. Even though database systems traditionally accommodate simultaneous requests, a multitude of synchronization ba ...

2012

Deadlock Immunity : Enabling General-Purpose Software to Defend Itself against Deadlocks

Horatiu Jula

Deadlock immunity is a property by which programs, once afflicted by a deadlock, develop resistance against future occurrences of that deadlock. We enable real applications to automatically achieve immunity against deadlock bugs involving mutex locks, sema ...

EPFL2011

Atomic boxes: coordinated exception handling with transactional memory

Vincent Gramoli, Pascal Felber

In concurrent programs raising an exception in one thread does not prevent others from operating on an inconsistent shared state. Instead, exceptions should ideally be handled in coordination by all the threads that are affected by their cause. In this pap ...

2011

A Method to Remove Deadlocks in Networks-on-Chips with Wormhole Flow Control

Giovanni De Micheli, Luca Benini, Srinivasan Murali, Ciprian Seiculescu

Networks-on-Chip (NoCs) are a promising interconnect paradigm to address the communication bottleneck of Systems-on-Chip (SoCs). Wormhole flow control is widely used as the transmission protocol in NoCs, as it offers high throughput and low latency. To mat ...

2010

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Dataflow Programs Analysis and Optimization Using Model Predictive Control Techniques. Two Examples of Bounded Buffer Scheduling: Deadlock Avoidance and Deadlock Recovery Strategies

Marco Mattavelli, Simone Casale Brunet, Endri Bezati

Springer2015