Publications related to AND gate

Memristive Devices Fabricated with Silicon Nanowire Schottky Barrier Transistors

Giovanni De Micheli, Sandro Carrara, Davide Sacchetto, Yusuf Leblebici, Mohamed Haykel Ben Jamaa

This paper reports on the memory and memristive effects of Schottky barrier field effect transistors (SBFET) with gate-all-around (GAA) configuration and Si nanowire (SiNW) channel. Similar behavior has also been investigated for SBFETs with poly-Si nanowi ...

IEEE Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2010

Organic thin-film transistors: the passivation of the dielectric-pentacene interface by dipolar self-assembled monolayers

Libero Zuppiroli, Stéphane Suarez, Franziska Dora Fleischli

In organic thin-film transistors (OTFTs), the conducting channel is located near the interface between the organic semiconductor and the oxide dielectric; this interface is crucial for transistor performance. Self-assembled monolayers (SAMs) on the interfa ...

American Chemical Society2010

From oxide surface to organic transistor properties: the nature and the role of oxide gate surface defects

Libero Zuppiroli, Stéphane Suarez, Franziska Dora Fleischli

By applying various surface treatments to the oxide gate of pentacene transistors, both in vacuum (H2, O2 and Ar plasma treatments) and in aqueous solution, we were able to vary the balance between oxygen-free radicals (Si•), oxygen-centered radicals (Si−O ...

American Chemical Society2010

Control of Ferromagnetism in a (Ga,Mn)As - Based Multiferroic System via a Ferroelectric Gate

Nava Setter, Igor Stolichnov, Harry Joseph Trodahl, Sebastian Riester

We report the implementation of a ferroelectric gate field effect transistor (FeFET) with a ferromagnetic (Ga,Mn)As conducting channel. The Curie temperature T-C in the channel is modulated by non-volatile poling of the gate. The ferroelectric state, and t ...

Amer Inst Physics, 2 Huntington Quadrangle, Ste 1No1 D, Melville, Ny 11747-4501 Usa2009

Methodology for the Digital Calibration of Analog Circuits and Systems Using Sub-binary Radix DACs

Maher Kayal, Marc Pastre

This paper presents a methodology for digitally calibrating analog circuits and systems. Based on the detection of an imperfection by a simple comparator, a successive approximations algorithm tunes a compensation current. The latter is generated by a sub- ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2009

Semiconductor device and method of manufacturing a semiconductor device

Mihai Adrian Ionescu, Didier Bouvet, Kirsten Emilie Moselund

The local bending of a silicon nanowire induces tensile strain in the wire due to the stretching of the silicon lattice. This in turn enhances the mobility of the free carriers (electrons) in the direction of transport along the wire. Thus, for example, wh ...

2009

Fabrication and Characterization of Vertically Stacked Gate-All-Around Si Nanowire FET Arrays

Giovanni De Micheli, Davide Sacchetto, Yusuf Leblebici

We describe the fabrication of vertically stacked Silicon Nanowire Field Effect Transistors (SiNWFETs) in Gate-All Around (GAA) configuration. Stacks with the number of channels ranging from 1 to 12 have been successfully produced by means of a micrometer ...

2009

Retention in nonvolatile silicon transistors with an organic ferroelectric gate

Mihai Adrian Ionescu, Nava Setter, Alexander Tagantsev, Igor Stolichnov, Didier Bouvet, Giovanni Antonio Salvatore, Sebastian Riester, Roman Gysel

A silicone-based one-transistor nonvolatile memory cell has been implemented by integration of a ferroelectric polymer gate on a standard n- type metal oxide semiconductor field effect transistor. The polarization reversal in the gate results in a stable a ...

2009

Asymmetrically strained all-silicon Tunnel FETs featuring 1V operation

Mihai Adrian Ionescu, Katherine Boucart, Walter Riess

This paper reports all-silicon asymmetrically strained Tunnel FET architectures that feature improved subthreshold swing and Ion/I off characteristics. We demonstrate that a lateral strain profile with a maximum of strain higher than 3GPa at the BTB source ...

2009

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