Publications related to Alpha 21264

SMoTherSpectre: Exploiting Speculative Execution through Port Contention

Babak Falsafi, Mathias Josef Payer, Atri Bhattacharyya

Spectre, Meltdown, and related attacks have demonstrated that kernels, hypervisors, trusted execution environments, and browsers are prone to information disclosure through micro-architectural weaknesses. However, it remains unclear as to what extent other ...

ACM2019

Trading off Energy versus Accuracy in Modern Computing Systems

Jérémy Lucien Maurice Schlachter

The slowdown of Moore's law, which has been the driving force of the electronics industry over the last 5 decades, is causing serious problem to Integrated Circuits (ICs) improvements. Technology scaling is becoming more and more complex and fabrication co ...

EPFL2018

Energy-Efficient Inexact Speculative Adder with High Performance and Accuracy Control

Christian Enz, Vincent Frédéric Camus, Jérémy Lucien Maurice Schlachter

Inexact and approximate circuit design is a promising approach to improve performance and energy efficiency in technology-scaled and low-power digital systems. Such strategy is suitable for error-tolerant applications involving perceptive or statistical ou ...

2015

Hierarchical Cycle Accounting: A New Method for Application Performance Tuning

Willy Zwaenepoel, Andrzej Pawel Nowak

To address the growing difficulty of performance debugging on modern processors with increasingly complex micro-architectures, we present Hierarchical Cycle Accounting (HCA), a structured, hierarchical, architecture-agnostic methodology for the identificat ...

2015

A New Basic Logic Structure for Data-Path Computation

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

Nowadays, Field Programmable Gate Arrays (FPGA) implement arithmetic functions using specific circuits at the logic block level, such as the carry paths, or at the structure level adopting Digital Signal Processing (DSP) blocks. Nevertheless, all these app ...

2014

Impact of body biasing on the retention time of gain-cell memories

Andreas Peter Burg, Adam Shmuel Teman, Pascal Andreas Meinerzhagen

Gain-cell-based embedded dynamic random-access memory (DRAMs) are a potential high-density alternative to mainstream static random-access memory (SRAM). However, the limited data retention time of these dynamic bitcells results in the need for power-consum ...

2013

A ReRAM-Based Non-Volatile Flip-Flop with Sub-VT Read and CMOS Voltage-Compatible Write

Giovanni De Micheli, Andreas Peter Burg, Davide Sacchetto, Pierre-Emmanuel Julien Marc Gaillardon, Pascal Andreas Meinerzhagen

The total power budget of Ultra-Low Power (ULP) VLSI Systems-on-Chip (SoCs) is often dominated by the leakage power of embedded memories and pipeline registers, which typically cannot be power-gated during sleep periods as they need to retain data and prog ...

2013

Reducing the Energy Dissipation of the Issue Queue by Exploiting Narrow Immediate Operands

Yusuf Onur Koçberber, Ilknur Cansu Kaynak

In contemporary superscalar microprocessors, issue queue is a considerable energy dissipating component due its complex scheduling logic. In addition to the energy dissipated for scheduling activities, read and write lines of the issue queue entries are al ...

2010

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Alpha 21264

Linebacker: Preserving Victim Cache Lines in Idle Register Files of GPUs

SMoTherSpectre: Exploiting Speculative Execution through Port Contention

Trading off Energy versus Accuracy in Modern Computing Systems

Energy-Efficient Inexact Speculative Adder with High Performance and Accuracy Control

Hierarchical Cycle Accounting: A New Method for Application Performance Tuning

A New Basic Logic Structure for Data-Path Computation

Impact of body biasing on the retention time of gain-cell memories

A ReRAM-Based Non-Volatile Flip-Flop with Sub-VT Read and CMOS Voltage-Compatible Write

Reducing the Energy Dissipation of the Issue Queue by Exploiting Narrow Immediate Operands

Predictor virtualization

Graph Chatbot

Chat with Graph Search

Linebacker: Preserving Victim Cache Lines in Idle Register Files of GPUs

Energy-Efficient Inexact Speculative Adder with High Performance and Accuracy Control

Hierarchical Cycle Accounting: A New Method for Application Performance Tuning

SMoTherSpectre: Exploiting Speculative Execution through Port Contention

Trading off Energy versus Accuracy in Modern Computing Systems

A New Basic Logic Structure for Data-Path Computation

Impact of body biasing on the retention time of gain-cell memories

A ReRAM-Based Non-Volatile Flip-Flop with Sub-VT Read and CMOS Voltage-Compatible Write

Reducing the Energy Dissipation of the Issue Queue by Exploiting Narrow Immediate Operands

Predictor virtualization