Concept

Cycles per instruction

Related publications (42)

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Do Children Adapt Their Perspective to a Robot When They Fail to Complete a Task?

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Spatial understanding and communication are essential skills in human interaction. An adequate understanding of others' spatial perspectives can increase the quality of the interaction, both perceptually and cognitively. In this paper, we take the first st ...

New York2022

DASS: Combining Dynamic & Static Scheduling in High-Level Synthesis

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A central task in high-level synthesis is scheduling: the allocation of operations to clock cycles. The classic approach to scheduling is static, in which each operation is mapped to a clock cycle at compile-time, but recent years have seen the emergence o ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Micro BTB: A High Performance and Storage Efficient Last-Level Branch Target Buffer for Servers

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High-performance branch target buffers (BTBs) and the L1I cache are key to high-performance front-end. Modern branch predictors are highly accurate, but with an increase in code footprint in modern-day server workloads, BTB and L1I misses are still frequen ...

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Non-Volatile Memory (NVM) is an emerging type of memory device that provides fast, byte-addressable, and high-capacity durable storage. NVM sits on the memory bus and allows durable data structures designs similar to the in-memory equivalent ones. Expensiv ...

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In CHES 2017, Jean et al. presented a paper on "Bit-Sliding" in which the authors proposed lightweight constructions for SPN based block ciphers like AES, PRESENT and SKINNY. The main idea behind these constructions was to reduce the length of the datapath ...

2020

Low-Overhead Dynamic Instruction Mix Generation using Hybrid Basic Block Profiling

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Dynamic instruction mixes form an important part of the toolkits of performance tuners, compiler writers, and CPU architects. Instruction mixes are traditionally generated using software instrumentation, an accurate yet slow method, that is normally limite ...

2018

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