Publications related to Rockchip

Sub-kHz-Linewidth External-Cavity Laser (ECL) With Si3N4 Resonator Used as a Tunable Pump for a Kerr Frequency Comb

Combining optical gain in direct-bandgap III-V materials with tunable optical feedback offered by advanced photonic integrated circuits is key to chip-scale external-cavity lasers (ECL), offering wideband tunability along with low optical linewidths. Exter ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2023

Gem5-X : A Many-Core Heterogeneous Simulation Platform for Architectural Exploration and Optimization

David Atienza Alonso, Marina Zapater Sancho, William Andrew Simon, Yasir Mahmood Qureshi

The increasing adoption of smart systems in our daily life has led to the development of new applications with varying performance and energy constraints, and suitable computing architectures need to be developed for these new applications. In this paper, ...

2021

Low-Cost Side-Channel Secure Standard 6T-SRAM-Based Memory With a 1% Area and Less Than 5% Latency and Power Overheads

Robert Giterman

Side-channel attacks constitute a concrete threat to IoT systems-on-a-chip (SoCs). Embedded memories implemented with 6T SRAM macrocells often dominate the area and power consumption of these SoCs. Regardless of the computational platform, the side-channel ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Secured Routines: Language-based Construction of Trusted Execution Environments

James Richard Larus, Edouard Bugnion, Adrien Ghosn

Trusted Execution Environments (TEEs), such as Intel SGX enclaves, use hardware to ensure the confidentiality and integrity of operations on sensitive data. While the technology is available on many processors, the complexity of its programming model and i ...

USENIX ASSOC2019

Milkomeda: Safeguarding the Mobile GPU Interface Using WebGL Security Checks

Mathias Josef Payer

GPU-accelerated graphics is commonly used in mobile applications. Unfortunately, the graphics interface exposes a large amount of potentially vulnerable kernel code (i.e., the GPU device driver) to untrusted applications. This broad attack surface has resu ...

ASSOC COMPUTING MACHINERY2018

Power, Area, and Performance Optimization of Standard Cell Memory Arrays Through Controlled Placement

Andreas Peter Burg, Adam Shmuel Teman, Luca Benini, Pascal Andreas Meinerzhagen

Embedded memory remains a major bottleneck in current integrated circuit design in terms of silicon area, power dissipation, and performance; however, static random access memories (SRAMs) are almost exclusively supplied by a small number of vendors throug ...

Association for Computing Machinery2016

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Rockchip

Sub-kHz-Linewidth External-Cavity Laser (ECL) With Si3N4 Resonator Used as a Tunable Pump for a Kerr Frequency Comb

Gem5-X : A Many-Core Heterogeneous Simulation Platform for Architectural Exploration and Optimization

Low-Cost Side-Channel Secure Standard 6T-SRAM-Based Memory With a 1% Area and Less Than 5% Latency and Power Overheads

Secured Routines: Language-based Construction of Trusted Execution Environments

Milkomeda: Safeguarding the Mobile GPU Interface Using WebGL Security Checks

Power, Area, and Performance Optimization of Standard Cell Memory Arrays Through Controlled Placement

Pyramic array: An FPGA based platform for multi-channel audio acquisition

Hardware Implementation and Applications of High Performance Multiple Camera Architectures

Graph Chatbot

Chat with Graph Search

Sub-kHz-Linewidth External-Cavity Laser (ECL) With Si3N4 Resonator Used as a Tunable Pump for a Kerr Frequency Comb

Gem5-X : A Many-Core Heterogeneous Simulation Platform for Architectural Exploration and Optimization

Milkomeda: Safeguarding the Mobile GPU Interface Using WebGL Security Checks

Hardware Implementation and Applications of High Performance Multiple Camera Architectures

Low-Cost Side-Channel Secure Standard 6T-SRAM-Based Memory With a 1% Area and Less Than 5% Latency and Power Overheads

Pyramic array: An FPGA based platform for multi-channel audio acquisition

Secured Routines: Language-based Construction of Trusted Execution Environments

Power, Area, and Performance Optimization of Standard Cell Memory Arrays Through Controlled Placement