Are you an EPFL student looking for a semester project?
Work with us on data science and visualisation projects, and deploy your project as an app on top of Graph Search.
Concept
Instruction set simulator
Summary
An instruction set simulator (ISS) is a simulation model, usually coded in a high-level programming language, which mimics the behavior of a mainframe or microprocessor by "reading" instructions and maintaining internal variables which represent the processor's registers.
Instruction simulation is a methodology employed for one of several possible reasons:
To simulate the instruction set architecture (ISA) of a future processor to allow software development and test to proceed without waiting for the development and production of the hardware to finish. This is often known as "shift-left" or "pre-silicon support" in the hardware development field. A full system simulator or virtual platform for the future hardware typically includes one or more instruction set simulators.
To simulate the machine code of another hardware device or entire computer for upward compatibility.
For example, the IBM 1401 was simulated on the later IBM/360 through use of microcode emulation.
To monitor and execute the machine code instructions (but treated as an input stream) on the same hardware for test and debugging purposes, e.g. with memory protection (which protects against accidental or deliberate buffer overflow).
To improve the speed performance—compared to a slower cycle-accurate simulator—of simulations involving a processor core where the processor itself is not one of the elements being verified; in hardware description language design using Verilog where simulation with tools like ISS can be run faster by means of "PLI" (not to be confused with PL/1, which is a programming language).
Instruction-set simulators can be implemented using three main techniques:
Interpretation, where each instruction is executed directly by the ISS.
Just-in-time compilation (JIT), where the code to be executed is first translated into the instruction set of the host computer. This is typically about ten times faster than a well-optimized interpreter.
Virtualization, where processor extensions for virtual machines are used to execute instructions in the ISS.
Official source
About this result
This page is automatically generated and may contain information that is not correct, complete, up-to-date, or relevant to your search query. The same applies to every other page on this website. Please make sure to verify the information with EPFL's official sources.