Publications related to Bit slicing

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Wireless network simplification: the Gaussian N-relay diamond network

Christina Fragouli, Ayfer Özgür Aydin

We consider the Gaussian N-relay diamond net- work, where a source wants to communicate to a destination node through a layer of N-relay nodes. We investigate the following question: What fraction of the capacity can we maintain by using only k out of the ...

2011

ECC2K-130 on Cell CPUs

Joppe Willem Bos, Thorsten Kleinjung

This paper describes an implementation of Pollard's rho algorithm to compute the elliptic curve discrete logarithm for the Synergistic Processor Elements of the Cell Broadband Engine Architecture. Our implementation targets the elliptic curve discrete loga ...

Springer-Verlag New York, Ms Ingrid Cunningham, 175 Fifth Ave, New York, Ny 10010 Usa2010

Real-Time GNSS Software Receiver Optimized for General Purpose Microprocessors

Marcel Baracchi Frei

A satellite navigation system (like GPS) allows an user to determine its own position everywhere and anytime on Earth. The process of calculating the position is relatively simple (use of trilateration). The main issue is to obtain and decode the transmitt ...

University of Neuchâtel2010

Batch processing for efficient base-band operations in real-time GNSS software receivers

Pierre-André Farine, Cyril Botteron, Marcel Baracchi Frei

Personal Digital Assistants (PDAs) or mobile phones applications are not anymore restricted to multimedia or wireless communications, but have been extended to handle Global Navigation Satellite System (GNSS) functionalities. The new generation of portable ...

Inst Navigation, 815 15Th Th St Nw, Ste 832, Washington, Dc 20005 Usa2010

High-Performance Modular Multiplication on the Cell Processor

Joppe Willem Bos

This paper presents software implementation speed records for modular multiplication arithmetic on the synergistic processing elements of the Cell broadband engine (Cell) architecture. The focus is on moduli which are of special interest in elliptic curve ...

Springer-Verlag New York, Ms Ingrid Cunningham, 175 Fifth Ave, New York, Ny 10010 Usa2010

Bio-Inspired Self-Testing and Self-Organizing Bit Slice Processors

Joël Rossier

Inspired by the basic processes of molecular biology, our previous studies resulted in defining self-testing and self-organizing mechanisms made up of simple processes. The goal of our paper is to introduce a configurable molecule able to implement these b ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2009

On the Capacity of Non-Coherent Network Coding

Mahdi Jafari, Christina Fragouli, Suhas Diggavi

The min-cut value towards a single receiver in a network with unit capacity edges can be achieved by routing a single bit. The multicast theorem in network coding shows that, the common min-cut value towards N >= 1 receivers can also be achieved using pack ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2009

Temperature-Aware Processor Frequency Assignment for MPSoCs Using Convex Optimization

Giovanni De Micheli, David Atienza Alonso, Srinivasan Murali

The increasing processing capability of Multi-Processor Systems-on-Chips (MPSoCs) is leading to an increase in chip power dissipation, which in turn leads to significant increase in chip temperature. An important challenge facing the MPSoC designers is to ...

2007

Bit slicing

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Wireless network simplification: the Gaussian N-relay diamond network

ECC2K-130 on Cell CPUs

Real-Time GNSS Software Receiver Optimized for General Purpose Microprocessors

Batch processing for efficient base-band operations in real-time GNSS software receivers

High-Performance Modular Multiplication on the Cell Processor

Bio-Inspired Self-Testing and Self-Organizing Bit Slice Processors

On the Capacity of Non-Coherent Network Coding

Experimental Study and Numerical Simulation of the Flindt Draft Tube Rotating Vortex

Experimental study on prediction model for maximum rebound ratio

Temperature-Aware Processor Frequency Assignment for MPSoCs Using Convex Optimization

Bio-Inspired Self-Testing and Self-Organizing Bit Slice Processors

ECC2K-130 on Cell CPUs

Batch processing for efficient base-band operations in real-time GNSS software receivers

On the Capacity of Non-Coherent Network Coding

Temperature-Aware Processor Frequency Assignment for MPSoCs Using Convex Optimization

Experimental Study and Numerical Simulation of the Flindt Draft Tube Rotating Vortex

Wireless network simplification: the Gaussian N-relay diamond network

High-Performance Modular Multiplication on the Cell Processor

Real-Time GNSS Software Receiver Optimized for General Purpose Microprocessors

Experimental study on prediction model for maximum rebound ratio