Concept

Memory paging

Related publications (279)

A Distributed Interleaving Scheme for Efficient Access to WideIO DRAM Memory

Giovanni De Micheli, Luca Benini, Ciprian Seiculescu

Achieving the main memory (DRAM) required bandwidth at ac- ceptable power levels for current and future applications is a ma- jor challenge for System-on-Chip designers for mobile platforms. Three dimensional (3D) integration and 3D stacked DRAM mem- ories ...

2012

Obstruction degree: measuring concurrency in shared memory systems

Rachid Guerraoui, Mihai Letia

This paper presents the notion of obstruction degree, a new metric for reasoning about the scalability of concurrent algorithms. Essentially, this simple metric gives an indication as to which of two concurrent algorithms is expected to scale better, as we ...

2012

SLIC Superpixels Compared to State-of-the-art Superpixel Methods

Pascal Fua, Sabine Süsstrunk, Radhakrishna Achanta, Kevin Smith, Aurélien Lucchi, Appu Shaji

Computer vision applications have come to rely increasingly on superpixels in recent years, but it is not always clear what constitutes a good superpixel algorithm. In an effort to understand the benefits and drawbacks of existing methods, we empirically c ...

Institute of Electrical and Electronics Engineers2012

Graph Drawing

Radoslav Fulek, Fabrizio Frati

In this paper we study the page number of upward planar directed acyclic graphs. We prove that the page number of any upward planar directed acyclic graph G is a function of the page number of a four-connected subgraph of G; further, we provide an upper bo ...

Springer Berlin Heidelberg2012

On The Power of Hardware Transactional Memory to Simplify Memory Management

Aleksandar Dragojevic

Dynamic memory management is a significant source of complexity in the design and implementation of practical concurrent data structures. We study how hardware transactional memory (HTM) can be used to simplify and streamline memory reclamation for such da ...

ACM2011

Methodology for Developing Real-time Motorway Traffic Risk Identification Models Using Individual Vehicle Data

André-Gilles Dumont, Edward Chung, Ashish Bhaskar, Minh Hai Pham

Most of existing motorway traffic safety studies using disaggregate traffic flow data aim at developing models for identifying real-time traffic risks by comparing pre-crash and non-crash conditions. One of serious shortcomings in those studies is that non ...

2011

Neural mechanisms and computations underlying stress effects on learning and memory

Maria del Carmen Sandi Perez, Gediminas Luksys

Stress has complex effects on memory function that can vary depending on the type of information that is learned and in relation to inter-individual characteristics. Recent work has also shown that stress can switch performance between memory systems, bias ...

2011

Cache-Aware Lock-Free Concurrent Hash Tries

Martin Odersky, Aleksandar Prokopec

This report describes an implementation of a non-blocking concurrent shared-memory hash trie based on single-word compare-and-swap instructions. Insert, lookup and remove operations modifying different parts of the hash trie can be run independent of each ...

2011

Émulation de mémoire partagée en environnements distribués dynamiques

Vincent Gramoli

Most distributed systems are large-scale and dynamic. Communication has thus become a critical issue and the shared memory, which is a reliable paradigm of communication, allow distributed nodes to exchange information through read and write operations. In ...

2011

A Novel Conflict-Free Memory and Processor Architecture for DVB-T2 LDPC Decoding

Alberto Jimenez Pacheco

In this paper, we present a flexible architecture for an LDPC decoder that fully exploits the structure of the codes defined in the DVB-T2 standard (Digital Video Broadcasting - Second Generation Terrestrial). We propose a processor and memory architecture ...

2011

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