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Related publications (16)

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We describe a model and implementation of evolutionary spiking neurons for embedded microcontrollers with few bytes of memory and very low power consumption. The approach is tested with an autonomous microrobot of less than 1 in^3 that evolves the ability ...

MIT Press2002

Batched Patch Caching for Streaming Media

Pascal Frossard

We elaborate on a scheme that combines batch patching at an origin server and prefix/interval caching at an edge server receiving the clients' requests. We derive a cost function that factors in the aggregate backbone rate, the cache occupancy and the disk ...

2002

This paper presents an evaluation of three software implementations of release consistency. Release consistent protocols allow data communication to be aggregated, and multiple writers to simultaneously modify a single page. We evaluated an eager invalidat ...

1995

Mechanisms for Cooperative Shared Memory

Babak Falsafi, James Richard Larus, David Wood

We introduce a new organization for multi-bank caches: the skewed-associative cache. A two-way skewed-associative cache has the same hardware complexity as a two-way set-associative cache, yet simulations show that it typically exhibits the same hit ratio ...

1994

Compiling for Shared-Memory and Message-Passing Computers

James Richard Larus

ACM1993

Optimistic Implementation of Bulk Data Transfer Protocols

Willy Zwaenepoel

During a bulk data transfer over a high speed network, there is a high probability that the next packet received from the network by the destination host is the next packet in the transfer. An optimistic implementation of a bulk data transfer protocol take ...

1989

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