Concept

NOR gate

Related publications (79)

Fabrication of silicon nano wires and gate-all-around MOS devices

The invention relates to methods for manufacturing semiconductor devices. Processes are disclosed for implementing suspended single crystal silicon nano wires (NWs) using a combination of anisotropic and isotropic etches and spacer creation for sidewall pr ...

2007

Current Mode Euclidean Distance Calculation Circuit for Kohonen's Neural Network Implemented in CMOS 0.18μm Technology

Rafal Tomasz Dlugosz

In this paper we present analog current mode Euclidean distance calculation (EDC) block, which calculates the distance between two current vectors. The proposed circuit is an important part of the CMOS-implemented Kohonen’s neural network (KNN) designed fo ...

2007

Optimization at Container Terminals: Status, Trends and Perspectives

Michel Bierlaire, Matteo Salani, Ilaria Vacca

International sea-freight container transportation has grown dramatically over the last years and container terminals represent nowadays a key actor in the global shipping network. Terminal managers have to face with an increasing competitiveness among ter ...

2007

Optimization at Container Terminals: Status, Trends and Perspectives

Michel Bierlaire, Matteo Salani, Ilaria Vacca

Over the last years, international sea-freight container transportation has grown dramatically and container terminals play nowadays a key-role in the global shipping network. The increased competitiveness among terminals requires more and more efficiency ...

2007

Optimization of Container Terminal Operations

Michel Bierlaire, Matteo Salani, Ilaria Vacca

2007

Fast and Efficient Light Intensity Modulation in SOI with Gate-All-Around Transistor Phase Modulator

Mihai Adrian Ionescu, Luc Thévenaz, Kirsten Emilie Moselund

We report fast modulation (>30 GHz) in a SOI resonant cavity using integrated Bragg mirrors and a gate-all-around transistor as active element. Modulation depth >90% can be obtained in 12.5 μm long devices. ...

IEEE2006

Weak Inversion Performance of CMOS and DCVSPG Logic Families in Sub-300mV Range

Yusuf Leblebici, Omer Can Akgun

In this paper the advantages of using Differential Cascode Voltage Switch Pass Gate (DCVSPG) logic with regard to standard CMOS for subthreshold operation are presented. The two families are compared in terms of their performance and Energy-Delay-Product ( ...

2006

MONOLITHIC INTEGRATION OF NANOMECHANICAL RESONATORS WITH CMOS CIRCUITRY: FULL-WAFER NANOPATTERNING BY NANOSTENCIL LITHOGRAPHY

Jürgen Brugger, Marc Antonius Friedrich van den Boogaart

For the purpose of integrating nanomechanical structures with CMOS circuitry, nanostencil lithography ensures parallel patterning for rapid processing at wafer scale and nanometer-sized features definition. Moreover, this patterning technique is compatible ...

2006

Optical logic gates by nonlinear mixing in BBO

Demetri Psaltis

An experimental demonstration of a set of optical logic gates (OR, XOR, AND) is shown using non-linear mixing in a BBO crystal. Pulses generated by a femtosecond Ti:Sapphire laser at 800 nm (140 fs duration, 2nJ/pulse) are split in 4 beams evenly separated ...

Spie-Int Soc Optical Engineering, Po Box 10, Bellingham, Wa 98227-0010 Usa1999

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