Concept

Bank switching

Related publications (14)

Gate energy efficiency and negative capacitance in ferroelectric 2D/2D TFET from cryogenic to high temperatures

Mihai Adrian Ionescu, Ali Saeidi, Teodor Rosca, Sadegh Kamaei Bahmaei, Matteo Cavalieri, Carlotta Gastaldi, Luca Capua

We report the fabrication process and performance characterization of a fully integrated ferroelectric gate stack in a WSe2/SnSe2 Tunnel FETs (TFETs). The energy behavior of the gate stack during charging and discharging, together with the energy loss of a ...

NATURE PORTFOLIO2021

Real-Time Personalized Atrial Fibrillation Prediction on Multi-Core Wearable Sensors

David Atienza Alonso, Amir Aminifar, Miguel Peon Quiros, Adriana Arza Valdes, Elisabetta De Giovanni

In the recent Internet-of-Things (IoT) era where biomedical applications require continuous monitoring of relevant data, edge computing keeps gaining more and more importance. These new architectures for edge computing include multi-core and parallel compu ...

2020

ReRAM From Material Study to CMOS Co-integration

Elmira Shahrabi

The revolution of information-technology owes to silicon-based complementary-metal-oxide (CMOS) technology. However, CMOS technology approaches its physical limitation hardening the further progress of memory devices as well as computing paradigm requiring ...

EPFL2019

Highly Scalable Digital Silicon Photonic MEMS Switches

Niels Quack

Optical circuit switches with fast switching times can provide rapidly reconfigurable bandwidth in data center networks. Silicon photonic switches are attractive candidates with their fast response times and CMOS process compatibility. In this paper, we re ...

Ieee-Inst Electrical Electronics Engineers Inc2016

Highly Scalable Digital Silicon Photonic MEMS Switches

Niels Quack

Institute of Electrical and Electronics Engineers2015

Network-on-chip using request and reply trees for low-latency processor-memory communication

Babak Falsafi, Boris Robert Grot

A Network-On-Chip (NOC) organization comprises a die having a cache area and a core area, a plurality of core tiles arranged in the core area in a plurality of subsets, at least one cache memory bank arranged in the cache area, whereby the at least one cac ...

2014

Design of Digital SoC for Operation at High Temperatures

Radisav Cojbasic

There is a growing demand for Systems-on-Chip, integrating microprocessors, on-chip memories, data converters and a variety of sensors, which are capable of reliable operation at high temperatures. For instance, modern aircraft industry demands microcontro ...

EPFL2014

Multistable randomly switching oscillators: The odds of meeting a ghost

Martin Hasler, Igor Belykh

We consider oscillators whose parameters randomly switch between two values at equal time intervals. If random switching is fast compared to the oscillator's intrinsic time scale, one expects the switching system to follow the averaged system, obtained by ...

Springer Verlag2013

Système de conversion d'énergie

Yves Perriard, Paolo Germano, Christophe Bruno Auvigne

The system (20) has a switching unit (T1) adapted for switching reversibly between two configurations. A capacitor is connected in series between a secondary winding (9) and a connection terminal (A) in one of the configurations. Another capacitor is conne ...

2012

Nonholonomic source seeking in switching random fields

Mahmut Selman Sakar

We consider the problem of designing controllers for nonholonomic mobile robots converging to the source (minimum) of a field. In addition to the mobility constraints posed by the nonholonomic dynamics, we assume that the field is completely unknown to the ...

2010

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