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This study adds a new dimension to lab-on-a-chip systems by employing three-dimensional (3D) integration technology for improved performance, higher functionality, and on-chip computational power. Despite the extensive amount of current research on 3D memo ...
This paper presents some strategies for design space exploration of FPGA-based signal processing systems that are specified using the CAL dataflow language. The actor- oriented, high-level of abstraction provided by CAL allows flexible exploration and cons ...
This paper presents a real-time processing platform for high definition stereo video. The system is capable to process stereo-video streams at resolutions up to 1920x1080 at 30 frames per second (1080p30). In the hybrid FPGA-GPU-CPU system, a high-density ...
This paper describes a pipeline synthesis and optimization technique that increases data throughput of FPGA-based system using minimum pipeline resources. The technique is applied on \CAL dataflow language, and designed based on relations, matrices and gra ...
When designing complex communication systems, such as MIMO-OFDM transceivers, prototypes have become an important tool for understanding the implementation trade-offs and the system behavior. This paper presents a real-time FPGA prototype for a 4-stream MI ...
The selective use of carry-save arithmetic, where appropriate, can accelerate a variety of arithmetic-dominated circuits. Carry-save arithmetic occurs naturally in a variety of DSP applications, and further opportunities to exploit it can be exposed throug ...
In this paper, we demonstrate fixed-point FPGA implementations of state space systems using Particle Filters, especially multi-target beating and range tracking systems. These trackers operate either as independent organic trackers or as a joint tracker to ...
In this paper design options when implementing programmable sampling rate converters are discussed. The theory and performance of the classical and new converters based on maximum order and minimum support (MOMS) splines is presented. FPGA designs are show ...
Leveraging the full power of multicore processors demands new tools and new thinking from the software industry.
Concurrency has long been touted as the "next big thing" and "the way of the future," but for the past 30 years, mainstream software developme ...
Formal verification of microprocessors requires a mechanism for efficient representation and manipulation of both arithmetic and random Boolean functions. Recently, a new canonical and graph-based representation called TED has been introduced for verificat ...