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System in a package

Related publications (110)

Learning-Based Hardware Design for Data Acquisition Systems

This multidisciplinary research work aims to investigate the optimized information extraction from signals or data volumes and to develop tailored hardware implementations that trade-off the complexity of data acquisition with that of data processing, conc ...

EPFL2018

Progress in single-photon avalanche diode image sensors in standard CMOS: From two-dimensional monolithic to three-dimensional-stacked technology

Edoardo Charbon, Myung Jae Lee

Single-photon detection and photon counting are useful tools in many fields, from light detection and ranging (LiDAR) to biomedical imaging and from time-resolved Raman spectroscopy to quantum applications. In this context, recently, single-photon avalanch ...

IOP PUBLISHING LTD2018

Ultra Low Power Deep-Learning-powered Autonomous Nano Drones

Luca Benini, Davide Scaramuzza

Flying in dynamic, urban, highly-populated environments represents an open problem in robotics. State-of-the-art (SoA) autonomous Unmanned Aerial Vehicles (UAVs) employ advanced computer vision techniques based on computationally expensive algorithms, such ...

2018

Design Optimization of 3D Multi-Processor System-on-Chip with Integrated Flow Cell Arrays

David Atienza Alonso, Marina Zapater Sancho, Ayse Kivilcim Coskun, Artem Andreev, Fulya Kaplan

Integrated flow cell array (FCA) is an emerging technology, targeting the cooling and power delivery challenges of modern 2D/3D Multi-Processor Systems-on-Chip (MPSoCs). In FCA, electrolytic solutions are pumped through microchannels etched in the silicon ...

2018

Experimental characterisation of the thermohydraulic performance of a micro-pin fin evaporator: Heat transfer, flow visualization and modelling

Chiara Falsetti

The global tendency towards miniaturization driven by the microelectronics industry is pushing system density and packaging towards unprecedented values of thermal design power, with a dramatic reduction of the surface area of the devices. Vertical integra ...

EPFL2018

Copper TSV-Based Process Development for Die-Level Homogeneous and Heterogeneous 3D Integration Platform

Seniz Esra Küçük

Research and development efforts on chip and wafer-scale 3D integration for system miniaturization have been continuing for more than a decade. However, there are still only a handful of 3D integrated products available in the market due to the high cost a ...

EPFL2017

10.1 A pin-efficient 20.83Gb/s/wire 0.94pJ/bit forwarded clock CNRZ-5-coded SerDes up to 12mm for MCM packages in 28nm CMOS

Mohammad Amin Shokrollahi, Seyed Armin Tajalli, Christoph Walter, Ali Hormati, Anant Pratap Singh, Omid Talebi Amiri, Klaas Lammert Hofstra, Sergio Pesenti

High-speed signaling over package substrates is key to delivering the promise of 2.5D integration. Applications abound and include high-density memory interfaces, sub-division of large dies to increase yield and lower development time, sub-division of a di ...

2016

LinvPy : a Python package for linear inverse problems

Guillaume François Paul Beaud

The goal of this project is to make a Python package including the tau-estimator algorithm to solve linear inverse problems. The package must be distributed, well documented, easy to use and easy to extend for future developers. ...

2016

Array imaging system for lithography

Toralf Scharf, Wilfried Noell, Raoul Kirner

We present an integrated array imaging system based on a stack of microlens arrays. The microlens arrays are manufactured by melting resist and reactive ion etching (RIE) technology on 8'' wafers (fused silica) and mounted by wafer-level packaging (WLP)(1) ...

Spie-Int Soc Optical Engineering2016

A Chip-Level Post-CMOS Via-Last Cu TSV Process for Multi-Layer Homogeneous 3D Integration

Seniz Esra Küçük, Yusuf Leblebici, Woo Yeong Cho

In this paper, a die-level CMOS post-processing scheme for 3D integration using the via-last approach is presented for multi-layer stacking. The process includes TSV fabrication, chip-to-chip bonding, and finally the TSV filling with Cu electroplating. The ...

Ieee2016

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