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VHDL

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Hardware-in-the-Loop Simulation Software for regulator tests and optimization

Hardware-in-the-Loop Simulation Software for regulator tests and optimization.

Compact Modeling of MOSFET in VHDL-AMS

Creating Virtual Prototypes of Complex MEMS Transducers Using Reduced-Order Modelling Methods and VHDL-AMS

Diseño de redes en chip de propósito específico con información de rutado físico

VHDL-AMS and Verilog-AMS as alternative hardware description languages for efficient modeling of multidiscipline systems

Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit

A low-power, multichannel gated oscillator-based CDR for short-haul applications

Modeling and Simulation of Multi-Discipline Systems using Bond Graphs and VHDL-AMS

Jitter Tolerance Analysis of Clock and Data Recovery Circuits using Matlab and VHDL-AMS