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Concept
Flat memory model
Summary
Flat memory model or linear memory model refers to a memory addressing paradigm in which "memory appears to the program as a single contiguous address space." The CPU can directly (and linearly) address all of the available memory locations without having to resort to any sort of bank switching, memory segmentation or paging schemes.
Memory management and address translation can still be implemented on top of a flat memory model in order to facilitate the operating system's functionality, resource protection, multitasking or to increase the memory capacity beyond the limits imposed by the processor's physical address space, but the key feature of a flat memory model is that the entire memory space is linear, sequential and contiguous.
In a simple controller, or in a single tasking embedded application, where memory management is not needed nor desirable, the flat memory model is the most appropriate, because it provides the simplest interface from the programmer's point of view, with direct access to all memory locations and minimum design complexity.
In a general purpose computer system, which requires multitasking, resource allocation, and protection, the flat memory system must be augmented by some memory management scheme, which is typically implemented through a combination of dedicated hardware (inside or outside the CPU) and software built into the operating system. The flat memory model (at the physical addressing level) still provides the greatest flexibility for implementing this type of memory management.
Memory model
Most modern memory models fall into one of three categories:
Simple interface for programmers, clean design
Greatest flexibility due to uniform access speed (segmented memory page switches usually incur varied latency due to longer accesses of other pages, either due to extra CPU logic in changing page, or hardware requirements)
Minimum hardware and CPU real estate for simple controller applications
Maximum execution speed, Simply there isn't any latency due to CPU or logic.
Official source
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