Concept

Cache prefetching

Related publications (84)

Accurate and complexity-effective spatial pattern prediction

Recent research suggests that there are large variations in a cache's spatial usage, both within and across programs. Unfortunately, conventional caches typically employ fixed cache line sizes to balance the exploitation of spatial and temporal locality, a ...

2004

Near-optimal precharging in high-performance nanoscale CMOS caches

Babak Falsafi

High-performance caches statically pull up the bit-lines in all cache subarrays to optimize cache access latency. Unfortunately, such architecture results in a significant waste of energy in nanoscale CMOS implementations due to high leakage and bitline di ...

2003

Miss Rate Prediction across All Program Inputs

Chen Ding

Improving cache performance requires understanding cache behavior. However, measuring cache performance for one or two data input sets provides little insight into how cache behavior varies across all data input sets. This paper uses our recently published ...

2003

A Flexible and Efficient Application Programming Interface (API) for a Customizable Proxy Cache

Willy Zwaenepoel

This paper describes the design, implementation, and performance of a simple yet powerful Application Programming Interface (API) for providing extended services in a proxy cache. This API facilitates the development of customized content adaptation, conte ...

2003

Optimizing traffic in DSM clusters: fine-grain memory caching versus page migration/replication

Babak Falsafi

In this paper we compare and contrast two techniques to improve capacity/conflict miss traffic in CC-NUMA DSM clusters. Page migration/replication optimizes read-write accesses to a page used by a single processor by migrating the page to that processor an ...

2002

Exploiting choice in resizable cache design to optimize deep-submicron processor energy-delay

Babak Falsafi

Cache memories account for a significant fraction of a chip's overall energy dissipation. Recent research advocates using "resizable" caches to exploit cache requirement variability in applications to reduce cache size and eliminate energy dissipation in t ...

2002

Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power

Sandhya Dwarkadas

Energy efficiency in microarchitectures has become a necessity. Significant dynamic energy savings can be realized for adaptive storage structures such as caches, issue queues, and register files by disabling unnecessary storage resources. Prior studies ha ...

2002

Two approaches for applet-based visible human slice extraction

Roger Hersch, Sebastian Gerlach

Real-time interactive slicing is a tool of choice for exploring 3D anatomic data sets such as the Visible Human. We offer real-time slicing on the Web by partitioning the application between a Java applet (the client) and the Web server. Two approaches for ...

SPIE-Int. Soc. Opt. Eng2001

An integrated circuit/architecture approach to reducing leakage in deep-submicron high-performance I-caches

Babak Falsafi

Deep-submicron CMOS designs maintain high transistor switching speeds by scaling down the supply voltage and proportionately, reducing the transistor threshold voltage. Lowering the threshold voltage increases leakage energy dissipation due to subthreshold ...

2001

Reducing leakage in a high-performance deep-submicron instruction cache

Babak Falsafi

Deep-submicron CMOS designs maintain high transistor switching speeds by scaling down the supply voltage and proportionately reducing the transistor threshold voltage. Lowering the threshold voltage increases leakage energy dissipation due to subthreshold ...

2001

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