Publications related to Cache hierarchy

Distributed Logless Atomic Durability with Persistent Memory

Babak Falsafi, Alexandros Daglis, Siddharth Gupta

Datacenter operators have started deploying Persistent Memory (PM), leveraging its combination of fast access and persistence for significant performance gains. A key challenge for PM-aware software is to maintain high performance while achieving atomic du ...

2019

Bridging the Latency Gap between NVM and DRAM for Latency-bound Operations

Anastasia Ailamaki, Georgios Psaropoulos

Non-Volatile Memory (NVM) technologies exhibit 4× the read access latency of conventional DRAM. When the working set does not fit in the processor cache, this latency gap between DRAM and NVM leads to more than 2× runtime increase for queries dominated by ...

ACM2019

Successive Refinement to Caching for Dynamic Content

Michael Christoph Gastpar, Pinar Sen

To reduce the network load during peak hours, servers deliver partial data to users during the off-peak time of the network before the actual requests are known, which is known as caching. This paper studies a single user caching problem in which the file ...

IEEE2019

Relaxed Wyner's Common Information

Michael Christoph Gastpar, Erixhen Sula

In the problem of coded caching for media delivery, two separate coding opportunities have been identified. The first opportunity is a multi-user advantage and crucially hinges on a public broadcast link in the delivery phase. This has been explored in a p ...

IEEE2019

Prefetched Address Translation

Edouard Bugnion, Boris Robert Grot, Dmitrii Ustiugov

With explosive growth in dataset sizes and increasing machine memory capacities, per-application memory footprints are commonly reaching into hundreds of GBs. Such huge datasets pressure the TLB, resulting in frequent misses that must be resolved through a ...

ASSOC COMPUTING MACHINERY2019

Interleaving with coroutines: a systematic and practical approach to hide memory latency in index joins

Anastasia Ailamaki, Georgios Psaropoulos

Index joins present a case of pointer-chasing code that causes data cache misses. In principle, we can hide these cache misses by overlapping them with computation: The lookups involved in an index join are parallel tasks whose execution can be interleaved ...

2018

Exploiting Compute Caches for Memory Bound Vector Operations

Paolo Ienne, Gabriel Falcao Paiva Fernandes, João Miguel Morgado Pereira Vieira

To reduce the average memory access time, most current processors make use of a multilevel cache subsystem. However, despite the proven benefits of such cache structures in the resulting throughput, conventional operations such as copy, simple maps and red ...

IEEE2018

Adaptive Cache Mode Selection for Queries over Raw Data

Anastasia Ailamaki, Tahir Azim, Azqa Nadeem

Caching the results of intermediate query results for future re-use is a common technique for improving the performance of analytics over raw data sources. An important design choice in this regard is whether to lazily cache only the offsets of satisfying ...

2018

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Cache hierarchy

Improving Main-memory Database System Performance through Cooperative Multitasking

Distributed Logless Atomic Durability with Persistent Memory

Bridging the Latency Gap between NVM and DRAM for Latency-bound Operations

Successive Refinement to Caching for Dynamic Content

Relaxed Wyner's Common Information

Prefetched Address Translation

Interleaving with coroutines: a systematic and practical approach to hide memory latency in index joins

Exploiting Compute Caches for Memory Bound Vector Operations

Adaptive Cache Mode Selection for Queries over Raw Data

RRAM Crossbar Arrays for Storage Class Memory Applications : Throughput and Density Considerations

Graph Chatbot

Chat with Graph Search

Improving Main-memory Database System Performance through Cooperative Multitasking

Bridging the Latency Gap between NVM and DRAM for Latency-bound Operations

Distributed Logless Atomic Durability with Persistent Memory

Successive Refinement to Caching for Dynamic Content

Prefetched Address Translation

Exploiting Compute Caches for Memory Bound Vector Operations

Relaxed Wyner's Common Information

Interleaving with coroutines: a systematic and practical approach to hide memory latency in index joins

Adaptive Cache Mode Selection for Queries over Raw Data

RRAM Crossbar Arrays for Storage Class Memory Applications : Throughput and Density Considerations