Are you an EPFL student looking for a semester project?
Work with us on data science and visualisation projects, and deploy your project as an app on top of Graph Search.
Concept
DEC 3000 AXP
Summary
DEC 3000 AXP was the name given to a series of computer workstations and servers, produced from 1992 to around 1995 by Digital Equipment Corporation. The DEC 3000 AXP series formed part of the first generation of computer systems based on the 64-bit Alpha AXP architecture. Supported operating systems for the DEC 3000 AXP series were DEC OSF/1 AXP (later renamed Digital UNIX) and OpenVMS AXP (later renamed OpenVMS).
All DEC 3000 AXP models used the DECchip 21064 (EV4) or DECchip 21064A (EV45) processor and inherited various features from the earlier MIPS architecture-based DECstation models, such as the TURBOchannel bus and the I/O subsystem.
The DEC 3000 AXP series was superseded in late 1994, with workstation models replaced by the AlphaStation line and server models replaced by the AlphaServer line.
There were three DEC 3000 model families, codenamed Pelican, Sandpiper, and Flamingo. Within Digital, this led to the DEC 3000 series being affectionately referred to as "the seabirds".
Note: Server configurations of the Model 400/500/600/700/800/900 systems were suffixed with "S".
The logic in Flamingo- and Sandpiper-based systems are contained on two modules (printed circuit boards), the CPU module and the I/O module, with the CPU module being the largest board. The two modules are connected via a 210-pin connector. The logic in Pelican-based systems are contained the CPU module and system module. The CPU module is a daughterboard that plugs into the system module and contains the CPU and the B-cache (L2 cache).
The architecture of the Flamingo- and Sandpiper-based systems is based around a crossbar switch implemented by an ADDR (Address) ASIC, four SLICE (data slice) ASICs and a TC (TURBOchannel) ASIC. These ASICs connect the various different width buses used in the system, allowing data to be transferred to the different subsystems. PALs were used to implement the control logic. The cache, memory and TURBOchannel controllers, as well as other control logic, is entirely implemented by PALs.
Official source
About this result
This page is automatically generated and may contain information that is not correct, complete, up-to-date, or relevant to your search query. The same applies to every other page on this website. Please make sure to verify the information with EPFL's official sources.