Gracemont (microarchitecture)

Gracemont is a microarchitecture for low-power processors used in systems on a chip (SoCs) made by Intel, and is the successor to Tremont. Like its predecessor, it is also implemented as low-power cores in a hybrid design of the Alder Lake and Raptor Lake processors. Gracemont is the fourth generation out-of-order low-power Atom microarchitecture, built on the Intel 7 manufacturing process. The Gracemont microarchitecture has the following enhancements over Tremont: Level 1 cache per core: eight-way-associative 64 KB instruction cache eight-way-associative 32 KB data cache New On-Demand Instruction Length Decoder Instruction issue increased to five per clock (from four) Instruction retire increased to eight per clock (from seven) Execution ports (functional units) there are now 17 (from eight) Reorder buffer increased to 256 entries (from 208) Improved branch prediction Support for AVX, AVX2, FMA3 and AVX-VNNI instructions System on a chip (SoC) architecture 3D tri-gate transistors 64 KB L1 instruction cache, up from 32 KB in Tremont 2 or 4 MB shared L2 cache per 4-core module Alder Lake-S/H/P/U family has 2 MB. Raptor Lake-S/H/P/U family has 4 MB. Intel Xe (Gen. 12.2) GPU with DirectX 12, OpenGL 4.6, Vulkan 1.3, OpenGL ES 3.2 and OpenCL 3.0 support. Thermal design power (TDP) 10 W desktop processors 6 W mobile processors Alder Lake and Raptor Lake The microarchitecture is used as the efficient cores of the 12th generation of Intel Core hybrid processors (codenamed "Alder Lake") and the 13th generation of Intel Core hybrid processors (codenamed "Raptor Lake"). It's used exclusively in the Alder Lake-N line-up.