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Recent developments in technologies such as Automatic Vehicle Location (AVL) and advanced control systems have stimulated new interest in bus priority facilities using traffic signals. The use of AVL systems has generated opportunities for implementing fle ...
Current Systems-On-Chip execute applications that demand extensive parallel processing. Networks-On-Chip (NoC) provide a structured way of realizing interconnections on silicon, and obviate the limitations of bus-based solutions. NoCs can have regular or a ...
Location finding searchers have recently emerged as essential elements in future CDMA wireless systems. In this paper we present a new combined architecture for location searchers and conventional RAKE receivers, which is based on multiplexing common hardw ...
In microprocessor-based systems, large power savings can be achieved through reduction of the transition activity of the on- and off-chip busses. This is because the total capacitance being switched when a voltage change occurs on a bus line is usually sen ...
We present theoretical and experimental results on the application of the two-lambda method for prolonged readout of holographic memories to shift multiplexing implemented with a spherical-wave reference beam. ...
Current Systems-On-Chip (SoC) execute applications that demand extensive parallel processing. Networks-On-Chip (NoC) provide a structured way of realizing interconnections on silicon, and obviate the limitations of bus-based solution. NoCs can have regular ...
Multimedia interfaces increase the need for large image databases, capable of storing and reading streams of data with strict synchronicity and isochronicity requirements. In order to fulfill these requirements, the authors consider a parallel image server ...
The article analyses the behavior of two kinds of multiprocessor multidisk storage server architectures for a data intensive application, namely for spatial queries in geographical information systems (GIS). The two kinds of servers are: (1) a workstation ...
Multimedia interfaces increase the need for large image databases, capable of storing and reading streams of data with strict synchronicity and isochronicity requirements. In order to fulfil these requirements, we use a parallel image server architecture w ...
The CERN Host Interface (CHI) is a family of interfaces to interconnect Fastbus, VMEbus, and external host computers. The Fastbus interface consists of a processor board (CHI-P) and host-specific I/O ports allowing connection using fast parallel or serial ...
