David Atienza AlonsoDavid Atienza Alonso is an associate professor of EE and director of the Embedded Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and PhD degrees in computer science and engineering from UCM, Spain, and IMEC, Belgium, in 2001 and 2005, respectively. His research interests include system-level design methodologies for multi-processor system-on-chip (MPSoC) servers and edge AI architectures. Dr. Atienza has co-authored more than 350 papers, one book, and 12 patents in these previous areas. He has also received several recognitions and award, among them, the ICCAD 10-Year Retrospective Most Influential Paper Award in 2020, Design Automation Conference (DAC) Under-40 Innovators Award in 2018, the IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He has also earned two best paper awards at the VLSI-SoC 2009 and CST-HPCS 2012 conference, and five best paper award nominations at the DAC 2013, DATE 2013, WEHA-HPCS 2010, ICCAD 2006, and DAC 2004 conferences. He serves or has served as associate editor of IEEE Trans. on Computers (TC), IEEE Design & Test of Computers (D&T), IEEE Trans. on CAD (T-CAD), IEEE Transactions on Sustainable Computing (T-SUSC), and Elsevier Integration. He was the Technical Program Chair of DATE 2015 and General Chair of DATE 2017. He served as President of IEEE CEDA in the period 2018-2019 and was GOLD member of the Board of Governors of IEEE CASS from 2010 to 2012. He is a Distinguished Member of ACM and an IEEE Fellow.
Andreas Peter BurgAndreas Burg was born in Munich, Germany, in 1975. He received his Dipl.-Ing. degree in 2000 from the Swiss Federal Institute of Technology (ETH) Zurich, Zurich, Switzerland. He then joined the Integrated Systems Laboratory of ETH Zurich, from where he graduated with the Dr. sc. techn. degree in 2006.
In 1998, he worked at Siemens Semiconductors, San Jose, CA. During his doctoral studies, he was an intern with Bell Labs Wireless Research for a total of one year. From 2006 to 2007, he held positions as postdoctoral researcher at the Integrated Systems Laboratory and at the Communication Theory Group of the ETH Zurich. In 2007 he co-founded Celestrius, an ETH-spinoff in the field of MIMO wireless communication, where he was responsible for the ASIC development as Director for VLSI. In January 2009, he joined ETH Zurich as SNF Assistant Professor and as head of the Signal Processing Circuits and Systems group at the Integrated Systems Laboratory.
In January 2011, he became a Tenure Track Assistant Professor at the Ecole Polytechnique Federale de Lausanne (EPFL) where he is leading the Telecommunications Circuits Laboratory in the School of Engineering. In June 2018 he was promoted to the role of a Tenured Associate Professor.
In 2000, Mr. Burg received the Willi Studer Award and the ETH Medal for his diploma and his diploma thesis, respectively. Mr. Burg was also awarded an ETH Medal for his Ph.D. dissertation in 2006. In 2008, he received a 4-years grant from the Swiss National Science Foundation (SNF) for an SNF Assistant Professorship. In his professional career, Mr. Burg was involved in the development of more than 25 ASICs. He is a member of the IEEE and of the European Association for Signal Processing (EURASIP).
Research interests and expertise
-
Circuits and systems for telecommunications (wireless and wired)
-
Prototyping and silicon implementation of new communication technologies
-
Development of communication algorithms and optimization for hardware implementation
-
Low-power VLSI signal processing for communications and other applications
-
Digital integrated circuits
-
Circuits for image and video processing
Serge VaudenaySerge Vaudenay entered at the Ecole Normale Supérieure in 1989 with a major in mathematics. He earned his agrégation (secondary teaching degree) in mathematics in 1992, then a PhD in Computer Science at the University of Paris 7 - Denis Diderot in 1995. He subsequently became a senior research fellow at the CNRS, prior to being granted his habilitation à diriger des recherches (a postdoctoral degree authorizing the recipient to supervise doctoral students). In 1999, he was appointed as a Professor at the EPFL, where he created the Security and Cryptography Laboratory.
Pierre VandergheynstPierre Vandergheynst received the M.S. degree in physics and the Ph.D. degree in mathematical physics from the Université catholique de Louvain, Louvain-la-Neuve, Belgium, in 1995 and 1998, respectively. From 1998 to 2001, he was a Postdoctoral Researcher with the Signal Processing Laboratory, Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland. He was Assistant Professor at EPFL (2002-2007), where he is now a Full Professor of Electrical Engineering and, by courtesy, of Computer and Communication Sciences. As of 2015, Prof. Vandergheynst serves as EPFL’s Vice-Provost for Education. His research focuses on harmonic analysis, sparse approximations and mathematical data processing in general with applications covering signal, image and high dimensional data processing, computer vision, machine learning, data science and graph-based data processing. He was co-Editor-in-Chief of Signal Processing (2002-2006), Associate Editor of the IEEE Transactions on Signal Processing (2007-2011), the flagship journal of the signal processing community and currently serves as Associate Editor of Computer Vision and Image Understanding and SIAM Imaging Sciences. He has been on the Technical Committee of various conferences, serves on the steering committee of the SPARS workshop and was co-General Chairman of the EUSIPCO 2008 conference. Pierre Vandergheynst is the author or co-author of more than 70 journal papers, one monograph and several book chapters. He has received two IEEE best paper awards. Professor Vandergheynst is a laureate of the Apple 2007 ARTS award and of the 2009-2010 De Boelpaepe prize of the Royal Academy of Sciences of Belgium.
Mario PaoloneMario Paolone received the M.Sc. (with honors) and the Ph.D. degree in electrical engineering from the University of Bologna, Italy, in 1998 and 2002, respectively. In 2005, he was appointed assistant professor in power systems at the University of Bologna where he was with the Power Systems laboratory until 2011. In 2010, he received the Associate Professor eligibility from the Politecnico di Milano, Italy. Since 2011 he joined the Swiss Federal Institute of Technology, Lausanne, Switzerland, where he is now Full Professor, Chair of the Distributed Electrical Systems laboratory and Head of the Swiss Competence Center for Energy Research (SCCER) FURIES (Future Swiss Electrical infrastructure). He was co-chairperson of the technical programme committees of the 9th edition of the International Conference of Power Systems Transients (IPST 2009) and of the 2016 Power Systems Computation Conference (PSCC 2016). He was chair of the technical programme committee of the 2018 Power Systems Computation Conference (PSCC 2018). In 2013, he was the recipient of the IEEE EMC Society Technical Achievement Award. He was co-author of several papers that received the following awards: best IEEE Transactions on EMC paper award for the year 2017, in 2014 best paper award at the 13th International Conference on Probabilistic Methods Applied to Power Systems, Durham, UK, in 2013 Basil Papadias best paper award at the 2013 IEEE PowerTech, Grenoble, France, in 2008 best paper award at the International Universities Power Engineering Conference (UPEC). He was the founder Editor-in-Chief of the Elsevier journal Sustainable Energy, Grids and Networks and was Associate Editor of the IEEE Transactions on Industrial Informatics. His research interests are in power systems with particular reference to real-time monitoring and operation, power system protections, power systems dynamics and power system transients. Mario Paolone is author or coauthor of over 300 scientific papers published in reviewed journals and international conferences.
Jean-Yves Le BoudecJean-Yves Le Boudec is full professor at EPFL and fellow of the IEEE. He graduated from Ecole Normale Superieure de Saint-Cloud, Paris, where he obtained the Agregation in Mathematics in 1980 (rank 4) and received his doctorate in 1984 from the University of Rennes, France. From 1984 to 1987 he was with INSA/IRISA, Rennes. In 1987 he joined Bell Northern Research, Ottawa, Canada, as a member of scientific staff in the Network and Product Traffic Design Department. In 1988, he joined the IBM Zurich Research Laboratory where he was manager of the Customer Premises Network Department. In 1994 he joined EPFL as associate professor. His interests are in the performance and architecture of communication systems. In 1984, he developed analytical models of multiprocessor, multiple bus computers. In 1990 he invented the concept called "MAC emulation" which later became the ATM forum LAN emulation project, and developed the first ATM control point based on OSPF. He also launched public domain software for the interworking of ATM and TCP/IP under Linux. He proposed in 1998 the first solution to the failure propagation that arises from common infrastructures in the Internet. He contributed to network calculus, a recent set of developments that forms a foundation to many traffic control concepts in the internet. He earned the Infocom 2005 Best Paper award, with Milan Vojnovic, for elucidating the perfect simulation and stationarity of mobility models, the 2008 IEEE Communications Society William R. Bennett Prize in the Field of Communications Networking, with Bozidar Radunovic, for the analysis of max-min fairness and the 2009 ACM Sigmetrics Best Paper Award, with Augustin Chaintreau and Nikodin Ristanovic, for the mean field analysis of the age of information in gossiping protocols. He is or has been on the program committee or editorial board of many conferences and journals, including Sigcomm, Sigmetrics, Infocom, Performance Evaluation and ACM/IEEE Transactions on Networking. He co-authored the book "Network Calculus" (2001) with Patrick Thiran and is the author of the book "Performance Evaluation of Computer and Communication Systems" (2010).
