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Since the invention of the pendulum clock by Christiaan Huygens in 1657, precision timekeepers have been regulated by oscillators. Although the pendulum is not an isochronous oscillator, its introduction as a time basis for clock regulation led to a signif ...
Flow reshaping is used in time-sensitive networks (as in the context of IEEE TSN and IETF Detnet) in order to reduce burstiness inside the network and to support the computation of guaranteed latency bounds. This is performed using per-flow regulators (suc ...
Aging is characterized by a decline in tissue function, but the underlying changes at cellular resolution across the organism remain unclear. Here, we present the Aging Fly Cell Atlas, a single-nucleus transcriptomic map of the whole aging Drosophila. We c ...
As an increase of intelligent and self-powered devices is forecasted for our future everyday life, the implementation of energy-autonomous devices that can wirelessly communicate data from sensors is crucial. Even though techniques such as voltage scaling ...
Three-dimensional (3-D) or vertical integration is a design and packaging paradigm that can mitigate many of the increasing challenges related to the design of modern integrated systems. 3-D circuits have recently been at the spotlight, since these circuit ...
CO2 sequestration in deep geological formations is considered as a promising technology to reduce the impact of CO2 on the greenhouse effect. Practically, large-volume of CO2 could be injected into a system that consists of a highly porous host reservoir c ...
The demand on high speed Analog to Digital Converters (ADCs) has increased considerably the last years. From communications circuit to high speed oscilloscopes, Giga Samples per second (GS/s) ADCs are requested. With the scaling of the CMOS technology, des ...
Dual-edge-triggered (DET) synchronous operation is a very attractive option for low-power, high-performance designs. Compared to conventional single-edge synchronous systems, DET operation is capable of providing the same throughput at half the clock frequ ...
This work reports a low power implementation of a 60Gb/s NRZ optical receiver (RX) in 14nm bulk CMOS finFET featuring a first-order digital CDR with high jitter tolerance (JTOL). The design includes a single phase-rotator (PR) with low complexity control l ...
A horological detent escapement for a horological movement arranged to transmit a torque from said horological movement to an oscillating regulating organ of said horological movement, the regulating organ comprising a first mobile body and the escapement ...