Publications related to Page cache

Intermediate Address Space: virtual memory optimization of heterogeneous architectures for cache-resident workloads

David Atienza Alonso, Marina Zapater Sancho, Luis Maria Costero Valero, Darong Huang, Qunyou Liu

The increasing demand for computing power and the emergence of heterogeneous computing architectures have driven the exploration of innovative techniques to address current limitations in both the compute and memory subsystems. One such solution is the use ...

2024

A Large-Scale Characterization of How Readers Browse Wikipedia

Robert West, Tiziano Piccardi, Akhil Arora

Despite the importance and pervasiveness of Wikipedia as one of the largest platforms for open knowledge, surprisingly little is known about how people navigate its content when seeking information. To bridge this gap, we present the first systematic large ...

ASSOC COMPUTING MACHINERY2023

Request, Coalesce, Serve, and Forget: Miss-Optimized Memory Systems for Bandwidth-Bound Cache-Unfriendly Applications on FPGAs

Paolo Ienne, Mikhail Asiatici

Applications such as large-scale sparse linear algebra and graph analytics are challenging to accelerate on FPGAs due to the short irregular memory accesses, resulting in low cache hit rates. Nonblocking caches reduce the bandwidth required by misses by re ...

ASSOC COMPUTING MACHINERY2022

NVCache: A Plug-and-Play NVMM-based I/O Booster for Legacy Systems

Rafael Pereira Pires, Pascal Felber

This paper introduces NVCache, an approach that uses a non-volatile main memory (NVMM) as a write cache to improve the write performance of legacy applications. We compare NVCache against file systems tailored for NVMM (Ext4-DAX and NOVA) and with I/O-heav ...

IEEE2021

Access pattern based optimization of memory access

Anastasia Ailamaki, Georgios Psaropoulos

A method for optimizing memory access for database operations is provided. The method may include identifying an access pattern associated with a database operation. The access pattern may include data required to perform the database operation. One or mor ...

2020

An Associativity-Agnostic in-Cache Computing Architecture Optimized for Multiplication

David Atienza Alonso, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, William Andrew Simon

With the spread of cloud services and Internet of Things concept, there is a popularization of machine learning and artificial intelligence based analytics in our everyday life. However, an efficient deployment of these data-intensive services requires per ...

2019

Gem5-X: A Gem5-Based System Level Simulation Framework to Optimize Many-Core Platforms

David Atienza Alonso, Marina Zapater Sancho, William Andrew Simon, Yasir Mahmood Qureshi

The rapid expansion of online-based services requires novel energy and performance efficient architectures to meet power and latency constraints. Fast architectural exploration has become a key enabler in the proposal of architectural innovation. In this p ...

IEEE2019

Successive Refinement to Caching for Dynamic Content

Michael Christoph Gastpar, Pinar Sen

To reduce the network load during peak hours, servers deliver partial data to users during the off-peak time of the network before the actual requests are known, which is known as caching. This paper studies a single user caching problem in which the file ...

IEEE2019

Exploiting Compute Caches for Memory Bound Vector Operations

Paolo Ienne, Gabriel Falcao Paiva Fernandes, João Miguel Morgado Pereira Vieira

To reduce the average memory access time, most current processors make use of a multilevel cache subsystem. However, despite the proven benefits of such cache structures in the resulting throughput, conventional operations such as copy, simple maps and red ...

IEEE2018

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Page cache

Intermediate Address Space: virtual memory optimization of heterogeneous architectures for cache-resident workloads

A Large-Scale Characterization of How Readers Browse Wikipedia

Request, Coalesce, Serve, and Forget: Miss-Optimized Memory Systems for Bandwidth-Bound Cache-Unfriendly Applications on FPGAs

Columnar Storage Optimization and Caching for Data Lakes

NVCache: A Plug-and-Play NVMM-based I/O Booster for Legacy Systems

Access pattern based optimization of memory access

An Associativity-Agnostic in-Cache Computing Architecture Optimized for Multiplication

Gem5-X: A Gem5-Based System Level Simulation Framework to Optimize Many-Core Platforms

Successive Refinement to Caching for Dynamic Content

Exploiting Compute Caches for Memory Bound Vector Operations

Graph Chatbot

Chat with Graph Search

Successive Refinement to Caching for Dynamic Content

Columnar Storage Optimization and Caching for Data Lakes

Access pattern based optimization of memory access

Request, Coalesce, Serve, and Forget: Miss-Optimized Memory Systems for Bandwidth-Bound Cache-Unfriendly Applications on FPGAs

An Associativity-Agnostic in-Cache Computing Architecture Optimized for Multiplication

A Large-Scale Characterization of How Readers Browse Wikipedia

Gem5-X: A Gem5-Based System Level Simulation Framework to Optimize Many-Core Platforms

Exploiting Compute Caches for Memory Bound Vector Operations

NVCache: A Plug-and-Play NVMM-based I/O Booster for Legacy Systems

Intermediate Address Space: virtual memory optimization of heterogeneous architectures for cache-resident workloads