Publications related to Page cache

Intermediate Address Space: virtual memory optimization of heterogeneous architectures for cache-resident workloads

David Atienza Alonso, Marina Zapater Sancho, Luis Maria Costero Valero, Darong Huang, Qunyou Liu

The increasing demand for computing power and the emergence of heterogeneous computing architectures have driven the exploration of innovative techniques to address current limitations in both the compute and memory subsystems. One such solution is the use ...

2024

Request, Coalesce, Serve, and Forget: Miss-Optimized Memory Systems for Bandwidth-Bound Cache-Unfriendly Applications on FPGAs

Paolo Ienne, Mikhail Asiatici

Applications such as large-scale sparse linear algebra and graph analytics are challenging to accelerate on FPGAs due to the short irregular memory accesses, resulting in low cache hit rates. Nonblocking caches reduce the bandwidth required by misses by re ...

ASSOC COMPUTING MACHINERY2022

HPCache: Memory-Efficient OLAP Through Proportional Caching

Anastasia Ailamaki, Hamish Mcniece Hill Nicholson, Periklis Chrysogelos

Analytical engines rely on in-memory caching to avoid disk accesses and provide timely responses by keeping the most frequently accessed data in memory. Purely frequency- & time-based caching decisions, however, are a proxy of the expected query execution ...

ACM2022

NVCache: A Plug-and-Play NVMM-based I/O Booster for Legacy Systems

Rafael Pereira Pires, Pascal Felber

This paper introduces NVCache, an approach that uses a non-volatile main memory (NVMM) as a write cache to improve the write performance of legacy applications. We compare NVCache against file systems tailored for NVMM (Ext4-DAX and NOVA) and with I/O-heav ...

IEEE2021

Large-Scale Graph Processing on FPGAs with Caches for Thousands of Simultaneous Misses

Paolo Ienne, Mikhail Asiatici

Efficient large-scale graph processing is crucial to many disciplines. Yet, while graph algorithms naturally expose massive parallelism opportunities, their performance is limited by the memory system because of irregular memory accesses. State-of-the-art ...

IEEE COMPUTER SOC2021

Rethinking Software Runtimes for Disaggregated Memory

Sanidhya Kashyap, Ivan Puddu

Disaggregated memory can address resource provisioning inefficiencies in current datacenters. Multiple software runtimes for disaggregated memory have been proposed in an attempt to make disaggregated memory practical. These systems rely on the virtual mem ...

ASSOC COMPUTING MACHINERY2021

Rebooting Virtual Memory with Midgard

Babak Falsafi, Mathias Josef Payer, Siddharth Gupta, Atri Bhattacharyya, Yunho Oh, Abhishek Bhattacharjee

Computer systems designers are building cache hierarchies with higher capacity to capture the ever-increasing working sets of modern workloads. Cache hierarchies with higher capacity improve system performance but shift the performance bottleneck to addres ...

2021

Access pattern based optimization of memory access

Anastasia Ailamaki, Georgios Psaropoulos

A method for optimizing memory access for database operations is provided. The method may include identifying an access pattern associated with a database operation. The access pattern may include data required to perform the database operation. One or mor ...

2020

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Page cache

Intermediate Address Space: virtual memory optimization of heterogeneous architectures for cache-resident workloads

Request, Coalesce, Serve, and Forget: Miss-Optimized Memory Systems for Bandwidth-Bound Cache-Unfriendly Applications on FPGAs

Columnar Storage Optimization and Caching for Data Lakes

HPCache: Memory-Efficient OLAP Through Proportional Caching

NVCache: A Plug-and-Play NVMM-based I/O Booster for Legacy Systems

Large-Scale Graph Processing on FPGAs with Caches for Thousands of Simultaneous Misses

Software Support for Non-Volatile Memory (NVM) Programming

Rethinking Software Runtimes for Disaggregated Memory

Rebooting Virtual Memory with Midgard

Access pattern based optimization of memory access

Graph Chatbot

Chat with Graph Search

Intermediate Address Space: virtual memory optimization of heterogeneous architectures for cache-resident workloads

Request, Coalesce, Serve, and Forget: Miss-Optimized Memory Systems for Bandwidth-Bound Cache-Unfriendly Applications on FPGAs

Columnar Storage Optimization and Caching for Data Lakes

HPCache: Memory-Efficient OLAP Through Proportional Caching

NVCache: A Plug-and-Play NVMM-based I/O Booster for Legacy Systems

Large-Scale Graph Processing on FPGAs with Caches for Thousands of Simultaneous Misses

Software Support for Non-Volatile Memory (NVM) Programming

Rethinking Software Runtimes for Disaggregated Memory

Rebooting Virtual Memory with Midgard

Access pattern based optimization of memory access