Publications related to 36-bit computing

EdgeAI-Aware Design of In-Memory Computing Architectures

Driven by the demand for real-time processing and the need to minimize latency in AI algorithms, edge computing has experienced remarkable progress. Decision-making AI applications stand out for their heavy reliance on data-centric operations, predominantl ...

EPFL2024

Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference

David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, Flavio Ponzina

By supporting the access of multiple memory words at the same time, Bit-line Computing (BC) architectures allow the parallel execution of bit-wise operations in-memory. At the array periphery, arithmetic operations are then derived with little additional o ...

2023

Error Resilient In-Memory Computing Architecture for CNN Inference on the Edge

David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, Flavio Ponzina

The growing popularity of edge computing has fostered the development of diverse solutions to support Artificial Intelligence (AI) in energy-constrained devices. Nonetheless, comparatively few efforts have focused on the resiliency exhibited by AI workload ...

2022

Horizontal side-channel full key recovery on ephemeral SIKE

Natacha Yolande Emmanuel Marie Linard de Guertechin, Aymeric Genet, Novak Kaluderovic

This paper describes the first practical single-trace side-channel power analysis of SIKE. The attack exploits the nature of elliptic curve point addition formulas which require the same function to be executed multiple times. We target the three point lad ...

2021

Some Cryptanalytic Results on Lizard

Subhadeep Banik

Lizard is a lightweight stream cipher proposed by Hamann, Krause and Meier in IACR ToSC 2017. It has a Grain-like structure with two state registers of size 90 and 31 bits. The cipher uses a 120 bit secret key and a 64 bit IV. The authors claim that Lizard ...

2017

Faster ECC over $\mathbb{F}_{2^{521}-1}$

Robert Granger

In this paper we present a new multiplication algorithm for residues modulo the Mersenne prime

2^{521}−1

. Using this approach, on an Intel Haswell Core i7-4770, constant-time variable-base scalar multiplication on NIST’s (and SECG’s) curve P-521 requires ...

Springer Berlin Heidelberg2015

Implementation and Optimization of a Galileo E1 Two-Step Tracking Algorithm using Data/Pilot Combining and Extended Integration Time

Pierre-André Farine, Cyril Botteron, Aleksandar Jovanovic, Youssef Tawk

This paper brings additional light on the previously proposed two-step tracking algorithm for E1 CBOC tracking. More specifically, assessment of the different DLL and PLL tracking loop architectures are analyzed, taking into consideration coherent and non- ...

Inst Navigation2011

Bit Precision Analysis for Compressed Sensing

Mohammad Amin Shokrollahi, Mahdi Cheraghchi Bashi Astaneh

This paper studies the stability of some reconstruction algorithms for compressed sensing in terms of the bit precision. Considering the fact that practical digital systems deal with discretized signals, we motivate the importance of the total number of ac ...

2009

Quantitative analysis of the bit size dependence on the pulse width and pulse voltage in ferroelectric memory devices using atomic force microscopy

Nava Setter

The Bit formation using atomic force microscopy (AFM) was studied on 270-nm-thick < 111 > preferentially oriented Pb(Zr0.4Ti0.6)O-3 (PZT) films prepared by the sol-gel process. To minimize the cantilever-sample capacitive farce interaction, the experiment ...

2001

Deciding properties of number fields without factoring

Mohammad Amin Shokrollahi

The polynomial time algorithm of Lenstra, Lenstra, and Lovász [15] for factoring integer polynomials and variants thereof have been widely used to show that various computational problems in number theory have polynomial time solutions. Among them is the p ...

1997

36-bit computing

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EdgeAI-Aware Design of In-Memory Computing Architectures

Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference

Error Resilient In-Memory Computing Architecture for CNN Inference on the Edge

Horizontal side-channel full key recovery on ephemeral SIKE

Some Cryptanalytic Results on Lizard

Faster ECC over $\mathbb{F}_{2^{521}-1}$

Implementation and Optimization of a Galileo E1 Two-Step Tracking Algorithm using Data/Pilot Combining and Extended Integration Time

Bit Precision Analysis for Compressed Sensing

Quantitative analysis of the bit size dependence on the pulse width and pulse voltage in ferroelectric memory devices using atomic force microscopy

Deciding properties of number fields without factoring

EdgeAI-Aware Design of In-Memory Computing Architectures

Horizontal side-channel full key recovery on ephemeral SIKE

Error Resilient In-Memory Computing Architecture for CNN Inference on the Edge

Some Cryptanalytic Results on Lizard

Faster ECC over $\mathbb{F}_{2^{521}-1}$

Implementation and Optimization of a Galileo E1 Two-Step Tracking Algorithm using Data/Pilot Combining and Extended Integration Time

Bit Precision Analysis for Compressed Sensing

Deciding properties of number fields without factoring

Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference

Quantitative analysis of the bit size dependence on the pulse width and pulse voltage in ferroelectric memory devices using atomic force microscopy