Lecture
VHDL for Simulation & Testbenches
Related lectures (37)
Generating a CLK Generator (PLL) IP in Vivado
Covers the process of generating a Clock Generator (PLL) IP in Vivado using the Clocking Wizard tool.
VALI Tutorial: Debugging and Running
Covers loop closing, error reporting, and running simulations in the VALI tutorial.
Using EMACS to edit VHDL
Covers the basics of using EMACS for editing VHDL code.
Hardware Description Languages
Explores the history and significance of Hardware Description Languages in automating design processes and describing parallel hardware.
Programming P2012: Challenges and Solutions
Explores challenges and solutions in programming the P2012 test chip, from software ecosystem to runtime management.
Microcontrollers Simulation: AVRstudio4MOOC: Understanding Microcontrollers
Covers the simulation of microcontrollers using AVRstudio4 and debugging tools.
Introduction to VHDL
Introduces VHDL, covering its history, key features, library system, entity, architecture, signals, and data types.
Optimization and Simulation: Introduction to Simulation
Introduces state-of-the-art methods in optimization and simulation, covering topics like statistical analysis, variance reduction, and simulation projects.
Designing Learning Experiences: CS411 Class Project
Introduces the CS411 Class Project, where students design and test a lesson using learning theories.
Simulation: Control of Dynamic Systems
Explores simulation of common structures and control of dynamic systems through friction and elasticity constants.