In-System Debug and Custom AXI IP

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Related lectures (32)

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Arbiter FSM & FPGA Implementation

Covers the design of an Arbiter FSM in VHDL for digital system design, emphasizing access timing management.

High-Level Synthesis: Formally Verified Elastic Circuits

Presents the development of a verified high-level synthesis compiler for elastic circuits.

Keylock in VHDL and on FPGA

Covers the design of a KeyLock system in VHDL, focusing on the FSM implementation for key validation and LED indication.

Parallel Port & Nios II Interrupts

Covers the design of a programmable parallel port interface for an Avalon bus and the architecture of the Nios II processor.

Project Organization & Intro

Introduces the PONG Project in Digital System Design, focusing on developing a custom digital circuit for a PONG game with a Mandelbrot background.

LED Effects with Custom IP and HW Support

Explores LED effects design with custom IP and hardware support, covering topics like LED brightness modulation, XILINX Vivado design flow, and connecting top-level ports to FPGA pins.

Logic Design: Basic Rules and Shannon's Expansion

Covers basic rules of logic design and Shannon's expansion in Boolean functions.

Digital Logic Circuits: CMOS and Verilog Design

Discusses digital logic circuits, CMOS technology, and Verilog for circuit design.

From Algorithms to Architectures

Explores the transition from algorithms to hardware architectures in digital system design, covering isomorphic architectures, VHDL implementation, and hardware efficiency metrics.

FPGA Architecture: LUT and Routing Arrays

Explores FPGA architecture, including LUTs and routing arrays, scalability, and placement challenges.