Catherine Dehollain

Biography

She got the Master Degree in Electrical Engineering in 1982 from EPFL. Then, she worked in Geneva up to 1990 as a Senior Design Engineer in telecommunications at the European research center of Motorola. From 1990 up to 1995, she did her PhD thesis at the Chaire des Circuits et Systemes at EPFL in the domain of impedance broadband matching circuits. Since 1995, she is responsible at EPFL for the RFIC group. She has participated to different Swiss research projects as well as European projects dedicated to data communication of sensors nodes (e.g. MuMoR, Minami European projects) as well as remote powering of sensor nodes. Her main domains of interest are telecom applications (e.g. Impulse radio Ultra-Wide Band, super-regenerative receivers, RFIDs)as well as biomedical applications. She has been the coordinator of European projects (e.g. FP6 SUPREGE, FP7 Ultrasponder)and of Swiss projects (e.g. CAPED CTI project, NEURO-IC SNF project).

Official source

https://people.epfl.ch/catherine.dehollain

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A Battery-Free Wireless Smart Sensor platform with Bluetooth Low Energy Connectivity for Smart Agriculture

Catherine Dehollain, Roberto La Rosa

Smart agriculture systems, which integrate sensors and data analysis into agricultural production processes, are increasingly proving an effective solution for reducing food production waste, yield production increase, and product quality improvement. In this context, this paper deals with a wireless sensors platform for humidity, temperature, and light detection that has the peculiarity to be self-powered and battery-free. The main advantage of the proposed solution is the elimination of maintenance interventions due to battery replacement. Therefore, the availability of install-and-forget sensors allows an easy diffusion for a capillary detection of plant health and growth parameters throughout the cultivated area. The device platform implements off-the-shelf components on a printed circuit board (PCB) with the size of 2 x 2 cm2 and the thickness of 0.45 cm. The sensor platform can harvest energy and supply the sensors with light intensity as low as 300 lux and communicate with Bluetooth Low Energy communication. Experimental measurements carried out in the rural context of the rows of a vineyard show the system functionality with a reliable communication distance, between the sensor platform and a remote Base Station, within a radius of 160 m.

IEEE2022

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This paper presents an energy and area efficient capacitively-coupled chopper instrumentation amplifier (CCIA) dedicated to implantable bridge sensor systems. Chopper stabilization is employed to decrease its offset and 1/f noise and the resulting ripple due to the up-modulated offset and 1/f noise is suppressed by a switched-capacitor ripple reduction loop. The gain of the instrumentation amplifier is defined by a programmable capacitive feedback network with a gain range from 40 V/V to 116 V/V, which is suitable for use with bridge sensors having different output voltages. The proposed CCIA has been fabricated in a standard 0.18 mu m CMOS process. It achieves an input noise of 88.2 nV/root Hz, a worst-case input offset of 5 mu V, and an output ripple of less than 185 mu V. The CCIA occupies only 0.17 mm(2) chip area and draws 3.3 mu A current from a 1.2 V supply.

IEEE2022

An Energy-Efficient Bridge-to-Digital Converter for Implantable Pressure Monitoring Systems

Diego Ruben Barrettino, Mustafa Besirli, Catherine Dehollain, Franco Maloberti, Marco Mattavelli, Kerim Türe

This paper presents an energy-efficient, duty-cycled, and spinning excitation bridge-to-digital converter (BDC) designed for implantable pressure sensing systems. The circuit provides the measure of the pulmonary artery pressure that is particularly relevant for the monitoring of heart failure and pulmonary hypertension patients. The BDC is made of a piezoresistive pressure sensor and a readout integrated circuit (IC) that comprises an instrumentation amplifier (IA) followed by an analog-to-digital converter (ADC). The proposed design spins both the bridge excitation and the ADC’s sampling input voltages simultaneously and exploits duty cycling to reduce the static power consumption of the bridge sensor and IA while cancelling the IA’s offset and 1/f noise at the same time. The readout IC has been designed and fabricated in a standard 180-nm CMOS process and achieves 8.4 effective number of bits (ENOB) at 1 kHz sampling rate while drawing 0.53 µA current from a 1.2 V supply. The BDC, built with the readout IC and a differential pressure sensor having 5 kΩ bridge resistances, achieves 0.44 mmHg resolution in a 270 mmHg pressure range at 1 ms conversion time. The current consumption of the bridge sensor by employing duty cycling is reduced by 99.8% thus becoming 0.39 µA from a 1.2 V supply. The total conversion energy of the pressure sensing system is 1.1 nJ, and achieves a figure-of-merit (FoM) of 3.3 pJ/conversion, which both represent the state of the art.

2022