Publications by Zeynep Toprak Deniz

Evaluating Resistance of MCML Technology to Power Analysis Attacks Using a Simulation-Based Methodology

Paolo Ienne, Francesco Regazzoni, Yusuf Leblebici, Zeynep Toprak Deniz

This paper explores the resistance of MOS Current Mode Logic (MCML) against attacks based on the observation of the power consumption. Circuits implemented in MCML, in fact, have unique characteristics both in terms of power consumption and the dependency ...

2009

A 1.8V 12-bit 230-MS/s pipeline ADC in 0.18um CMOS technology

Seyed Armin Tajalli, Yusuf Leblebici, Zeynep Toprak Deniz, Omer Can Akgun, Thomas Liechti

This paper describes the implementation of a 12-bit 230 MS/s pipelined ADC using a conventional 1.8V, 0.18μm digital CMOS process. Two-stage folded cascode OTA topology is used for improved settling performance. Extreme low-skew (less than 3ps peak-to-peak ...

IEEE2008

On-Line Global Energy Optimization in Multi-Core Systems Using Principles of Analog Computation

Eric Vittoz, Yusuf Leblebici, Zeynep Toprak Deniz

This work presents the design and the silicon implementation of an on-line energy optimizer unit based on novel analog computation approaches, which is capable of dynamically adjusting power supply voltages and operating frequencies of multiple processing ...

2007

Low-Power Adaptive Bias/Clock Generator Using 0.18um CMOS Technology for Multi-Core Continuous Voltage and Frequency Scaling

Yusuf Leblebici, Zeynep Toprak Deniz

This paper presents a continuous voltage and frequency scaling approach achieving lower transition (both energy and time) overheads implied by changing voltage levels, at a very low power dissipation and silicon area cost for multi-processor systems with i ...

2005

A Low-Power Adaptive Bias/Clock Generator for Fine-Grained Voltage and Frequency Scaling in Multi-Core Systems

Yusuf Leblebici, Zeynep Toprak Deniz

2005

Low-Power Current Mode Logic for Improved DPA-Resistance in Embedded Systems

Yusuf Leblebici, Zeynep Toprak Deniz

In this work, MOS Current Mode Logic (MCML) is analyzed for low power, low noise, mixed signal applications demanding high security such as embedded cryptographic processors and smart cards. We emphasize the possible extension of MCML gate usage for low sp ...

2005

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Zeynep Toprak Deniz

Evaluating Resistance of MCML Technology to Power Analysis Attacks Using a Simulation-Based Methodology

A 1.8V 12-bit 230-MS/s pipeline ADC in 0.18um CMOS technology

On-Line Global Energy Optimization in Multi-Core Systems Using Principles of Analog Computation

Multi-unit global energy management and optimization for network-on-chip applications

Low-Power Adaptive Bias/Clock Generator Using 0.18um CMOS Technology for Multi-Core Continuous Voltage and Frequency Scaling

A Low-Power Adaptive Bias/Clock Generator for Fine-Grained Voltage and Frequency Scaling in Multi-Core Systems

Low-Power Current Mode Logic for Improved DPA-Resistance in Embedded Systems

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Evaluating Resistance of MCML Technology to Power Analysis Attacks Using a Simulation-Based Methodology

On-Line Global Energy Optimization in Multi-Core Systems Using Principles of Analog Computation

A 1.8V 12-bit 230-MS/s pipeline ADC in 0.18um CMOS technology

A Low-Power Adaptive Bias/Clock Generator for Fine-Grained Voltage and Frequency Scaling in Multi-Core Systems

Multi-unit global energy management and optimization for network-on-chip applications

Low-Power Adaptive Bias/Clock Generator Using 0.18um CMOS Technology for Multi-Core Continuous Voltage and Frequency Scaling

Low-Power Current Mode Logic for Improved DPA-Resistance in Embedded Systems