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Hu Xu

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Hu Xu

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Timing Uncertainty in 3-D Clock Trees due to Process Variations and Power Supply Noise

Effects of Process Variations on 3-D Global Clock Distribution Networks

Modeling and Design Techniques for 3-D ICs under Process, Voltage, and Temperature Variations

The Combined Effect of Process Variations and Power Supply Noise on Clock Skew and Jitter

Skew Variability in 3-D ICs with Multiple Clock Domains

Analytical Heat Transfer Model for Thermal Through-Silicon Vias

Process-induced skew variation for scaled 2-D and 3-D ICs

Synchronization and Power Integrity Issues in 3-D ICs

Repeater Insertion for Two-Terminal Nets in Three-Dimensional Integrated Circuits