Publications by Pinar Tözün | EPFL Graph Search

Micro-architectural Analysis of In-memory OLTP

Anastasia Ailamaki, Pinar Tözün, Danica Porobic, Utku Sirin

Micro-architectural behavior of traditional disk-based online transaction processing (OLTP) systems has been investigated extensively over the past couple of decades. Results show that traditional OLTP mostly under-utilize the available micro-architectural ...

2016

Characterization of the Impact of Hardware Islands on OLTP

Anastasia Ailamaki, Miguel Sérgio De Oliveira Branco, Pinar Tözün, Danica Porobic, Ippokratis Pandis

Modern hardware is abundantly parallel and increasingly heterogeneous. The numerous processing cores have non-uniform access latencies to the main memory and processor caches, which causes variability in the communication costs. Unfortunately, database sys ...

Springer Verlag2016

More Than A Network: Distributed OLTP on Clusters of Hardware Islands

Anastasia Ailamaki, Pinar Tözün, Danica Porobic, Raja Appuswamy

2016

Applying HTM to an OLTP System: No Free Lunch

Anastasia Ailamaki, Pinar Tözün, Danica Porobic, David Cervini

Transactional memory is a promising way for implementing efficient synchronization mechanisms for multicore processors. Intel's introduction of hardware transactional memory (HTM) into their Haswell line of processors marks an important step toward mainstr ...

2015

How to Stop Under-Utilization and Love Multicores

Anastasia Ailamaki, Pinar Tözün, Danica Porobic, Iraklis Psaroudakis, Erietta Liarou

Hardware trends oblige software to overcome three major challenges against systems scalability: (1) taking advantage of the implicit/vertical parallelism within a core that is enabled through the aggressive micro-architectural features, (2) exploiting the ...

2015

ATraPos: Adaptive Transaction Processing on Hardware Islands

Anastasia Ailamaki, Pinar Tözün, Danica Porobic, Erietta Liarou

Nowadays, high-performance transaction processing applications increasingly run on multisocket multicore servers. Such architectures exhibit non-uniform memory access latency as well as non-uniform thread communication costs. Unfortunately, traditional sha ...

2014

Dynamic Fine-Grained Scheduling for Energy-Efficient Main-Memory Queries

Anastasia Ailamaki, Pinar Tözün, Danica Porobic, Iraklis Psaroudakis, Erietta Liarou

Power and cooling costs are some of the highest costs in data centers today, which make improvement in energy efficiency crucial. Energy efficiency is also a major design point for chips that power whole ranges of computing devices. One important goal in t ...

2014

ADDICT: Advanced Instruction Chasing for Transactions

Anastasia Ailamaki, Pinar Tözün

Recent studies highlight that traditional transaction processing systems utilize the micro-architectural features of modern processors very poorly. L1 instruction cache and long-latency data misses dominate execution time. As a result, more than half of th ...

2014

Transactions Chasing Scalability and Instruction Locality on Multicores

Pinar Tözün

For several decades, online transaction processing (OLTP) has been one of the main server applications that drives innovations in the data management ecosystem, and in turn the database and computer architecture communities. Recent hardware trends oblige s ...

EPFL2014

How to Stop Under-Utilization and Love Multicores

Anastasia Ailamaki, Pinar Tözün, Danica Porobic, Iraklis Psaroudakis, Erietta Liarou

Designing scalable transaction processing systems on modern hardware has been a challenge for almost a decade. Hardware trends oblige software to overcome three major challenges against systems scalability: (1) Exploiting the abundant thread-level parallel ...

2014