Publications by Matthieu Berthomé

Electron mobility extraction in triangular gate-all-around Si nanowire junctionless nMOSFETs with cross-section down to 5 nm

Mihai Adrian Ionescu, Jean-Michel Sallese, Wladyslaw Grabinski, Mohammad Najmzadeh, Matthieu Berthomé

In this paper, we report the first systematic study on electron mobility extraction in equilateral triangular gate-all-around Si nanowire junctionless nMOSFETs with cross-section down to 5 nm. 1 x 10(19) cm(-3) n-type channel doping, 5-20 nm Si nanowire wi ...

Pergamon-Elsevier Science Ltd2014

Mobility Extraction Assessment in GAA Si NW JL FETs with Cross-Section Down to 5 nm

Mihai Adrian Ionescu, Jean-Michel Sallese, Wladyslaw Grabinski, Mohammad Najmzadeh, Matthieu Berthomé

In this paper, we report for the first time, assessment on mobility extraction in equilateral triangular gate-all-around Si nanowire junctionless (JL) nMOSFETs with cross-section down to 5 nm. This analysis was performed in accumulation regime, as a first ...

IEEE2013

Junctionless silicon nanowire transistors for the tunable operation of a highly sensitive, low power sensor

Mihai Adrian Ionescu, Montserrat Fernandez-Bolanos Badia, Matthieu Berthomé, Elizabeth Buitrago Godinez

Silicon nanowire (SiNW) field effect transistors (FETs) have been widely investigated as biological sensors for their remarkable sensitivity due to their large surface to volume ratio (S/V) and high selectivity towards a myriad of analytes through function ...

Elsevier2013

Scaling of Trigate Junctionless Nanowire MOSFET With Gate Length Down to 13 nm

Matthieu Berthomé

In this letter, we report the performance of high-kappa/metal gate nanowire (NW) transistors without junctions fabricated with a channel thickness of 9 nm and sub-15-nm gate length and NW width. Near-ideal subthreshold slope (SS) and extremely low leakage ...

Institute of Electrical and Electronics Engineers2012

Local volume depletion/accumulation in GAA Si nanowire junctionless nMOSFETs

Mihai Adrian Ionescu, Jean-Michel Sallese, Wladyslaw Grabinski, Mohammad Najmzadeh, Matthieu Berthomé

In this paper, we report, for the first time, corner effect analysis in the gate-all-around equilateral triangular silicon nanowire (NW) junctionless (JL) nMOSFETs, from subthreshold to strong accumulation regime. Corners were found to accumulate and deple ...

Institute of Electrical and Electronics Engineers2012