Simone Casale Brunet

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Pipeline Synthesis and Optimization from Branched Feedback Dataflow Programs

Marco Mattavelli, Simone Casale Brunet, Endri Bezati, Anatoly Prihozhy

Large dataflow designs are a result of behavioral specification of modern complex digital systems and/or a result of unfolding and transforming looped and branched programs. Since deep-submicron silicon technology provides large amounts of available resour ...

SPRINGER2020

An Heterogeneous Compiler Of Dataflow Programs For Zynq Platforms

Marco Mattavelli, Simone Casale Brunet, Romuald Mosqueron, Endri Bezati

In recent years, the number and variety of heterogeneous multiprocessor system-on-chip MPSoCs, such as for instance Zynq platforms, has sensibly increased. However, today all design flow solutions capable of programming the different components of such pla ...

IEEE2019

High-Precision Performance Estimation for the Design Space Exploration of Dynamic Dataflow Programs

Marco Mattavelli, Malgorzata Maria Michalska, Simone Casale Brunet, Endri Bezati

The implementation and optimization of dynamic dataflow programs on multi/many-core platforms require solving a very difficult problem: how to partition and schedule the processing elements and dimension their interconnecting buffers according to given opt ...

2017

Shared-variable Synchronization Approaches for Dynamic Data Flow Programs

Marco Mattavelli, Simone Casale Brunet, Endri Bezati, Apostolos Modas, Junaid Jameel Ahmad

This paper presents shared-variable synchronization approaches for dataflow programming. The mechanisms do not require any substantial model of computation (MoC) modification, and is portable across both for hardware (HW) and software (SW) low-level code s ...

IEEE2018

Execution Trace Graph of Dataflow Process Networks

Marco Mattavelli, Simone Casale Brunet

The paper introduces and specifies a formalism that provides complete representations of dataflow process network (DPN) program executions, by means of directed acyclic graphs. Such graphs, also known as execution trace graphs (ETG), are composed of nodes ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2018

Efficient Dynamic Optimisation Heuristics for Dataflow Pipelines

Marco Mattavelli, Simone Casale Brunet, Endri Bezati, Anatoly Prihozhy

Large dataflow designs appear as a result of functional specification of modern complex digital systems and/ or a result of unfolding and behavioral transformation of looped and branched programs. Since deep-submicron silicon technology provides large amou ...

IEEE2018

Performance estimation of program partitions on multi-core platforms, 2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)

Marco Mattavelli, Simone Casale Brunet, Endri Bezati, Malgorzata Maria Michalska, Junaid Jameel Ahmad

The exploration of different design configurations of dynamic dataflow programs executed on many-core or multi-core platforms is, in general, a very difficult task. Determining a close-to-optimal partitioning, scheduling and buffer dimensioning configurati ...

2017

High level synthesis of Smith-Waterman dataflow implementations

Marco Mattavelli, Simone Casale Brunet, Endri Bezati

The paper presents the results of design explorations for the implementation of the Smith-Waterman (S-W) algorithm executing DNA and protein sequences alignment. Both design explorations studies and the corresponding FPGA implementations are obtained by wr ...

2017

Buffer dimensioning for throughput improvement of dynamic dataflow signal processing applications on multi-core platforms

Marco Mattavelli, Malgorzata Maria Michalska, Simone Casale Brunet, Endri Bezati

Executing a dataflow program on a parallel platform requires assigning to each buffer a given size so that correct program executions take place without introducing any deadlock. Furthermore, in the case of dynamic dataflow programs, specific buffer size a ...

2017

Design space exploration of dataflow-based Smith-Waterman FPGA implementations

Marco Mattavelli, Simone Casale Brunet, Endri Bezati

2017

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Performance estimation of program partitions on multi-core platforms, 2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)

Marco Mattavelli, Simone Casale Brunet, Endri Bezati, Malgorzata Maria Michalska, Junaid Jameel Ahmad

2017

Buffer dimensioning for throughput improvement of dynamic dataflow signal processing applications on multi-core platforms

Marco Mattavelli, Malgorzata Maria Michalska, Simone Casale Brunet, Endri Bezati

2017