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Mirjana Stojilovic

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Mirjana Stojilovic

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Deep Learning Detection of GPS Spoofing

FPGA-to-CPU Undervolting Attacks

A Deep-Learning Approach to Side-Channel Based CPU Disassembly at Design Time

Electrical-Level Attacks on CPUs, FPGAs, and GPUs: Survey and Implications in the Heterogeneous Era

DFAulted: Analyzing and Exploiting CPU Software Faults Caused by FPGA-Driven Undervolting Attacks

Shrinking FPGA Static Power via Machine Learning-Based Power Gating and Enhanced Routing

NetCracker: A Peek into the Routing Architecture of Xilinx 7-Series FPGAs

Built-in Self-Evaluation of First-Order Power Side-Channel Leakage for FPGAs

Closing Leaks: Routing Against Crosstalk Side-Channel Attacks

X-Attack: Remote Activation of Satisfiability Don’t-Care Hardware Trojans on Shared FPGAs