Publications by Nicholas Alexander Preyss

An FPGA-Based 4 Mbps Secret Key Distillation Engine for Quantum Key Distribution Systems

Andreas Peter Burg, Jeremy Hugues-Felix Constantin, Nicholas Alexander Preyss, Pascal Junod

Quantum key distribution (QKD) enables provably secure communication between two parties over an optical fiber that arguably withstands any form of attack. Besides the need for a suitable physical signalling scheme and the corresponding devices, QKD also r ...

Springer2017

Automated Integration of Dual-Edge Clocking for Low-Power Operation in Nanometer Nodes

Andreas Peter Burg, Adam Shmuel Teman, Andrea Bonetti, Nicholas Alexander Preyss

Clocking power, including both clock distribution and registers, has long been one of the primary factors in the total power consumption of many digital systems. One straightforward approach to reduce this power consumption is to apply dual-edge-triggered ...

Association for Computing Machinery2017

Modulation, Coding, and Receiver Design for Gigabit mmWave Communication

Nicholas Alexander Preyss

While wireless communication has become an ubiquitous part of our daily life and the world around us, it has not been able yet to deliver the multi-gigabit throughput required for applications like high-definition video transmission or cellular backhaul co ...

EPFL2016

Digital Synchronization for Symbol-spaced IEEE802.11ad Gigabit mmWave Systems

Andreas Peter Burg, Nicholas Alexander Preyss

A complete digital synchronization architecture for an IEEE 802.11ad compliant 60 GHz receiver is presented. The characteristics of mmWave systems require a holistic view on the problem of parameter estimation, such that not each parameter is dealt with on ...

2015

Fractionally Spaced Complex Sub-Nyquist Sampling for Multi-Gigabit 60 GHz Wireless Communication

Andreas Peter Burg, Nicholas Alexander Preyss

A novel analog front-end architecture based on complex sub-Nyquist sampling for the intermediate frequency (IF) stage of a mmWave receiver is proposed. With this front-end, the use of a wideband hybrid coupler and two half-rate analog-to-digital converters ...

IEEE2015

A 3.52 Gb/s mmWave Baseband with Delayed Decision Feedback Sequence Estimation in 40 nm

Andreas Peter Burg, Nicholas Alexander Preyss, Carl Christian Sten Dominic Senning

We present a digital baseband ASIC for 60 GHz single-carrier (SC) transmission that is optimized for communication scenarios in which most of the energy is concentrated in the first few channel taps. Such scenarios occur for example in office environments ...

2015

Robust Asynchronous Indoor Localization Using Led Lighting

Andreas Peter Burg, Nicholas Alexander Preyss, Georg Robert Kail

We propose a low-cost system for indoor self-localization of mobile devices using modulated LED ceiling lamps that are fully autonomous and broadcast their identifiers without any synchronization. The proposed self-localization method is designed to handle ...

IEEE2014

A Parallelized Layered QC-LDPC Decoder for IEEE 802.11ad

Andreas Peter Burg, Alessandro Cevrero, Alexios Konstantinos Balatsoukas Stimming, Nicholas Alexander Preyss

We present a doubly parallelized layered quasi-cyclic low density parity-check decoder for the emerging IEEE 802.11ad multigigabit wireless standard. The decoding algorithm is equivalent to a nonparallelized layered decoder and, thus, retains its favorable ...

IEEE2013

Layered Detection and Decoding in MIMO Wireless Systems

Andreas Peter Burg, Nicholas Alexander Preyss, Christoph Studer

Iterative detection and decoding (IDD) in multiple-input multiple-output (MIMO) wireless systems is known to achieve near channel capacity. The high computational complexity of IDD, however, poses signiﬁcant challenges for practical implementations (in ter ...

IEEE2012

Configurable High-Throughput Decoder Architecture for Quasi-Cyclic LDPC Codes

Andreas Peter Burg, Nicholas Alexander Preyss, Christoph Studer

We describe a fully reconfigurable low-density parity check (LDPC) decoder for quasi-cyclic (QC) codes. The proposed hardware architecture is able to decode virtually any QC-LDPC code that fits into the allocated memories while achieving high decoding thro ...

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