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Alessandro Antonio Nacci

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Related publications (5)

Please note that this is not a complete list of this person’s publications. It includes only semantically relevant works. For a full list, please refer to Infoscience.

Parallelizing the Chambolle Algorithm for Performance Optimized Mapping on FPGA devices

David Atienza Alonso, Abdulkadir Akin, Ivan Beretta, Alessandro Antonio Nacci

The performance and the efficiency of recent computing platforms have been deeply influenced by the widespread adoption of hardware accelerators, such as Graphics Processing Units (GPUs) or Field Programmable Gate Arrays (FPGAs), which are often employed t ...

Assoc Computing Machinery2016

Efficient Hardware Design Of Iterative Stencil Loops

David Atienza Alonso, Ivan Beretta, Alessandro Antonio Nacci

A large number of algorithms for multidimensional signals processing and scientific computation come in the form of iterative stencil loops (ISLs), whose data dependencies span across multiple iterations. Because of their complex inner structure, automatic ...

Ieee-Inst Electrical Electronics Engineers Inc2016

A High-Level Synthesis Flow for the Implementation of Iterative Stencil Loop Algorithms on FPGA Devices

David Atienza Alonso, Ivan Beretta, Alessandro Antonio Nacci

The automatic generation of hardware implementations for a given algorithm is generally a difficult task, especially when data dependencies span across multiple iterations such as in iterative stencil loops (ISLs). In this paper, we introduce an automatic ...

IEEE/ACM Press2013