Publications by Vincent Frédéric Camus

Adaptive simulation-based framework for error characterization of inexact circuits

To design faster and more energy-efficient systems, numerous inexact arithmetic operators have been proposed, generally obtained by modifying the logic structure of conventional circuits. However, as the quality of service of an application has to be ensur ...

PERGAMON-ELSEVIER SCIENCE LTD2019

Survey of Precision-Scalable Multiply-Accumulate Units for Neural-Network Processing

Christian Enz, Vincent Frédéric Camus

The current trend for deep learning has come with an enormous computational need for billions of Multiply-Accumulate (MAC) operations per inference. Fortunately, reduced precision has demonstrated large benefits with low impact on accuracy, paving the way ...

IEEE2019

Design of approximate and precision-scalable circuits for embedded multimedia and neural-network processing

Vincent Frédéric Camus

Density, speed and energy efficiency of integrated circuits have been increasing exponentially for the last four decades following Moore's law. However, power and reliability pose several challenges to the future of technology scaling. Approximate computin ...

EPFL2019

Review and Benchmarking of Precision-Scalable Multiply-Accumulate Unit Architectures for Embedded Neural-Network Processing

Christian Enz, Vincent Frédéric Camus

The current trend for deep learning has come with an enormous computational need for billions of Multiply-Accumulate (MAC) operations per inference. Fortunately, reduced precision has demonstrated large benefits with low impact on accuracy, paving the way ...

2019

Hardware Acceleration of HDR-Image Tone Mapping on an FPGA-CPU Platform Through High-Level Synthesis

Christian Enz, Vincent Frédéric Camus, Alessandro Pezzotta, Jérémy Lucien Maurice Schlachter, Mattia Cacciotti

In this paper, the hardware acceleration of a tone-mapping algorithm for High-Dynamic-Range image processing is presented. Starting from the C++ source code, High-Level Synthesis has been performed using Xilinx SDSoC for a Xilinx Zynq SoC device. After an ...

IEEE2018

CASSIS: Characterization with Adaptive Sample-Size Inferential Statistics Applied to Inexact Circuits

Vincent Frédéric Camus

To design faster and more energy-efficient systems, numerous inexact arithmetic operators have been proposed, generally obtained by modifying the logic structure of conventional circuits. However, as the quality of service of an application has to be ensur ...

2018

Design of Approximate Circuits by Fabrication of False Timing Paths: The Carry Cut-Back Adder

Christian Enz, Vincent Frédéric Camus, Jérémy Lucien Maurice Schlachter, Mattia Cacciotti

This paper introduces a novel method for designing approximate circuits by fabricating and exploiting false timing paths, i.e. critical paths that cannot be logically activated. This allows to strongly relax timing constraints while guaranteeing minimal an ...

2018

Combining Structural and Timing Errors in Overclocked Inexact Speculative Adders

Christian Enz, Vincent Frédéric Camus, Mattia Cacciotti, Yu Jiang, Xun Jiao

Worst-case design is used in IoT devices and high performance data centers to ensure reliability, leading to a power efficiency loss. Recently, approximate computing has been proposed to trade off accuracy for efficiency. In this paper, we use Inexact Spec ...

Ieee2017

Design and Applications of Approximate Circuits by Gate-Level Pruning

Christian Enz, Vincent Frédéric Camus, Jérémy Lucien Maurice Schlachter

Energy-efficiency is a critical concern for many systems, ranging from Internet of things objects and mobile devices to high-performance computers. Moreover, after 40 years of prosperity, Moore's law is starting to show its economic and technical limits. N ...

Ieee-Inst Electrical Electronics Engineers Inc2017

System and Method for Optimization of Digital Circuits with Timing and Behavior Co-Designed by Introduction and Exploitation of False Paths

Christian Enz, Vincent Frédéric Camus, Jérémy Lucien Maurice Schlachter

A digital circuit including a signal path with a false path, whereby the signal path includes at least 3 logic instances, the digital circuit further including a logic monitoring element for monitoring a part of the digital circuit, and for outputting a cu ...

2017