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Mathias Soeken

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Mathias Soeken

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Formal Verification of Integer Multipliers by Combining Gröbner Basis with Logic Reduction

Fast Logic Synthesis for RRAM-based In-Memory Computing using Majority-Inverter Graphs

An Extension of Transformation-based Reversible and Quantum Circuit Synthesis

Unlocking efficiency and scalability of reversible logic synthesis using conventional logic synthesis

SyReC: A hardware description language for the specification and synthesis of reversible circuits

Enumeration of reversible functions and its application to circuit complexity

LUT Mapping and Optimization for Majority-Inverter Graphs

Inversion Minimization in Majority-Inverter Graphs

Multi-Objective BDD Optimization for RRAM based Circuit Design

Approximation-aware Rewriting of AIGs for Error Tolerant Applications